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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-07-03 00:24:28 +0300
committerFelix Held <felix-coreboot@felixheld.de>2021-04-08 16:47:27 +0000
commitde7262f82cdc1a7c868dbc9ca41e186e885eb2ba (patch)
treee8fe2e84070eb60d8baeeea7e0a2e17c8c4dfba3 /src/soc/amd
parentf8e440cadf4f332c676fddafd0357ecc07de5a4c (diff)
soc/amd: remove special GPIO_2 override soc_gpio_hook
This override was added to have the SCI mapping configured if GPIO was used as WAKE_L pin. This however didn't set up the SCI level and trigger information, so it likely never worked as intended. Change-Id: I44661f05c8f517ece88714c625603579731d174b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43049 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/cezanne/gpio.c10
-rw-r--r--src/soc/amd/common/block/gpio_banks/gpio.c4
-rw-r--r--src/soc/amd/common/block/include/amdblocks/gpio_banks.h2
-rw-r--r--src/soc/amd/picasso/gpio.c10
-rw-r--r--src/soc/amd/stoneyridge/gpio.c10
5 files changed, 0 insertions, 36 deletions
diff --git a/src/soc/amd/cezanne/gpio.c b/src/soc/amd/cezanne/gpio.c
index e1f504639d..f2a59e0497 100644
--- a/src/soc/amd/cezanne/gpio.c
+++ b/src/soc/amd/cezanne/gpio.c
@@ -1,10 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/gpio_banks.h>
-#include <amdblocks/acpimmio.h>
-#include <amdblocks/smi.h>
#include <soc/gpio.h>
-#include <soc/smi.h>
#include <types.h>
/* see the IOMUX function table for the mapping from GPIO number to GEVENT number */
@@ -40,10 +37,3 @@ void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items)
*table = gpio_event_table;
*items = ARRAY_SIZE(gpio_event_table);
}
-
-void soc_gpio_hook(uint8_t gpio, uint8_t mux)
-{
- /* Always program Gevent when WAKE_L_AGPIO2 is configured as WAKE_L */
- if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK))
- soc_route_sci(GPIO_2_EVENT);
-}
diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c
index af948ce357..186df5093d 100644
--- a/src/soc/amd/common/block/gpio_banks/gpio.c
+++ b/src/soc/amd/common/block/gpio_banks/gpio.c
@@ -179,8 +179,6 @@ uint16_t gpio_acpi_pin(gpio_t gpio)
return gpio;
}
-__weak void soc_gpio_hook(uint8_t gpio, uint8_t mux) {}
-
static void set_single_gpio(const struct soc_amd_gpio *g,
struct sci_trigger_regs *sci_trigger_cfg)
{
@@ -193,8 +191,6 @@ static void set_single_gpio(const struct soc_amd_gpio *g,
iomux_write8(g->gpio, g->function & AMD_GPIO_MUX_MASK);
iomux_read8(g->gpio); /* Flush posted write */
- soc_gpio_hook(g->gpio, g->function);
-
gpio_setbits32(g->gpio, PAD_CFG_MASK, g->control);
/* Clear interrupt and wake status (write 1-to-clear bits) */
gpio_or32(g->gpio, GPIO_INT_STATUS | GPIO_WAKE_STATUS);
diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
index 7e6914f78d..098208b123 100644
--- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
+++ b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
@@ -85,7 +85,5 @@ void program_gpios(const struct soc_amd_gpio *gpio_list_ptr, size_t size);
int gpio_interrupt_status(gpio_t gpio);
/* Implemented by soc, provides table of available GPIO mapping to Gevents */
void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items);
-/* May be implemented by soc to handle special cases */
-void soc_gpio_hook(uint8_t gpio, uint8_t mux);
#endif /* AMD_BLOCK_GPIO_BANKS_H */
diff --git a/src/soc/amd/picasso/gpio.c b/src/soc/amd/picasso/gpio.c
index b7e1a45b9b..fe7d14b139 100644
--- a/src/soc/amd/picasso/gpio.c
+++ b/src/soc/amd/picasso/gpio.c
@@ -1,10 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/gpio_banks.h>
-#include <amdblocks/acpimmio.h>
-#include <amdblocks/smi.h>
#include <soc/gpio.h>
-#include <soc/smi.h>
#include <types.h>
static const struct soc_amd_event gpio_event_table[] = {
@@ -39,10 +36,3 @@ void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items)
*table = gpio_event_table;
*items = ARRAY_SIZE(gpio_event_table);
}
-
-void soc_gpio_hook(uint8_t gpio, uint8_t mux)
-{
- /* Always program Gevent when WAKE_L_AGPIO2 is configured as WAKE_L */
- if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK))
- soc_route_sci(GPIO_2_EVENT);
-}
diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c
index d30fa63f56..90c23a2b4c 100644
--- a/src/soc/amd/stoneyridge/gpio.c
+++ b/src/soc/amd/stoneyridge/gpio.c
@@ -1,10 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/gpio_banks.h>
-#include <amdblocks/acpimmio.h>
-#include <amdblocks/smi.h>
#include <soc/gpio.h>
-#include <soc/smi.h>
#include <types.h>
static const struct soc_amd_event gpio_event_table[] = {
@@ -39,10 +36,3 @@ void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items)
*table = gpio_event_table;
*items = ARRAY_SIZE(gpio_event_table);
}
-
-void soc_gpio_hook(uint8_t gpio, uint8_t mux)
-{
- /* Always program Gevent when WAKE_L_AGPIO2 is configured as WAKE_L */
- if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK))
- soc_route_sci(GPIO_2_EVENT);
-}