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authorFelix Held <felix-coreboot@felixheld.de>2024-05-22 00:42:13 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-05-23 21:54:26 +0000
commitbfc92cb94414b3a51490fefa203180914da06fbb (patch)
treee8c7a905a093a05014344b72e8552f7399ddc3f1 /src/soc/amd
parent47eed41dcb2170b84c96c68c28208b5a97124503 (diff)
device: drop unnecessary CHECK_REV_IN_OPROM_NAME option
The CHECK_REV_IN_OPROM_NAME Kconfig option was introduced to solve the problem of the PCI VID/DID combination of the Picasso iGPU not being sufficient information to know which VGA BIOS file to run, so a new function that additionally checks the PCI revision of that device was introduced. Later it turned out that there might be a case where even that isn't sufficient, so the soc_is_raven2() function is used in the remap function to always use the correct VBIOS file. Picasso is the only SoC that selected the CHECK_REV_IN_OPROM_NAME Kconfig option, so all other SoCs are unaffected by this change. Now that we use the VBIOS images with only the PCI VID and DID in the CBFS file name for Picasso, SeaBIOS will find the VBIOS with the same ID as the iGPU in CBFS and we don't need the workaround to add a third VBIOS image via VGA_BIOS_DGPU_* that has the name that SeaBIOS expects. This will result in SeaBIOS now running the VBIOS that has the same PCI VID/DID as the hardware which will be the wrong one in the RV2 silicon showing the PCO silicon PCI VID/DID, but that was also the case with the VGA_BIOS_DGPU_* workaround where the board's Kconfig just selected one of the two possible images during build time and hoped that it was the correct one for that actual hardware. The only board where this patch might cause a regression compared to the old behavior is the AMD Cereme reference board with Pollock APU, but I'm not even sure if any coreboot developer still has one of those boards, so I'm willing to accept that. To properly solve the problem with SeaBIOS using the correct VBIOS file in all cases, we'd need to generate that info during coreboot runtime and somehow pass it to SeaBIOS, but that's out of scope for this patch. TEST=On Mandolin with PCO silicon, the display output in both SeaBIOS and Ubuntu still works. Booting Windows 10 via the pre-built EDK2 payload that I'm using also resulted in the display output working. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia6de533c536044698d85404427719b8f534870fa Reviewed-on: https://review.coreboot.org/c/coreboot/+/82598 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/picasso/Kconfig15
-rw-r--r--src/soc/amd/picasso/graphics.c13
2 files changed, 10 insertions, 18 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index d6c3fbd3e9..f450e294d7 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -230,10 +230,10 @@ config MAX_CPUS
config VGA_BIOS_ID
string
- default "1002,15d8,c1"
+ default "1002,15d8"
help
The default VGA BIOS PCI vendor/device ID should be set to the
- result of the map_oprom_vendev_rev() function in graphics.c.
+ result of the map_oprom_vendev() function in graphics.c.
config VGA_BIOS_FILE
string
@@ -244,25 +244,18 @@ config VGA_BIOS_SECOND
config VGA_BIOS_SECOND_ID
string
- default "1002,15dd,c4"
+ default "1002,15dd"
help
Some Dali and all Pollock APUs need a different VBIOS than some other
Dali and all Picasso APUs, but don't always have a different PCI
vendor/device IDs, so we need an alternate method to determine the
- correct video BIOS. In map_oprom_vendev_rev(), we look at the return
+ correct video BIOS. In map_oprom_vendev(), we look at the return
value of soc_is_raven2() and decide which rom to load.
config VGA_BIOS_SECOND_FILE
string
default "3rdparty/amd_blobs/picasso/Raven2GenericVbios.bin"
-config CHECK_REV_IN_OPROM_NAME
- bool
- default y
- help
- Select this in the platform BIOS or chipset if the option rom has a
- revision that needs to be checked when searching CBFS.
-
config S3_VGA_ROM_RUN
bool
default n
diff --git a/src/soc/amd/picasso/graphics.c b/src/soc/amd/picasso/graphics.c
index 3c2e0f8ad0..bd7ec77ae3 100644
--- a/src/soc/amd/picasso/graphics.c
+++ b/src/soc/amd/picasso/graphics.c
@@ -6,20 +6,19 @@
#include <soc/soc_util.h>
#include <stdint.h>
-void map_oprom_vendev_rev(u32 *vendev, u8 *rev)
+u32 map_oprom_vendev(u32 vendev)
{
- if (*vendev == PICASSO_VBIOS_VID_DID) {
+ if (vendev == PICASSO_VBIOS_VID_DID) {
/* Check if the RV2 video bios needs to be used instead of the RV1/PCO one */
if (soc_is_raven2()) {
printk(BIOS_NOTICE, "Using RV2 VBIOS.\n");
- *vendev = RAVEN2_VBIOS_VID_DID;
- *rev = RAVEN2_VBIOS_REV;
+ return RAVEN2_VBIOS_VID_DID;
} else {
printk(BIOS_NOTICE, "Using RV1/PCO VBIOS.\n");
- *rev = PICASSO_VBIOS_REV;
}
- } else if (*vendev == RAVEN2_VBIOS_VID_DID) {
+ } else if (vendev == RAVEN2_VBIOS_VID_DID) {
printk(BIOS_NOTICE, "Using RV2 VBIOS.\n");
- *rev = RAVEN2_VBIOS_REV;
}
+
+ return vendev;
}