diff options
| author | Kangheui Won <khwon@chromium.org> | 2020-05-07 15:21:20 +1000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-06-04 15:02:29 +0000 |
| commit | bd3245c2075c4915b2256593b414c8355d31001a (patch) | |
| tree | 71196c195bff6702abc0b8f2a9929861d7a4441a /src/soc/amd | |
| parent | 3909908de897dddf2182032f30369e235ebe4095 (diff) | |
soc/amd/picasso: fix iomap for ACPI_PM
offsets for ACPI_PM are incorrectly configured for picasso SoC.
Especially incorrect ACPI_PM_TMR_BLK makes kernel to spend 10 sec for
trying to testing it on wrong address.
Fix them to correct offset with hack for GPE0_BLK.
BUG=b:147044624
TEST=build and boot on trembyle; PM Timer error is gone
Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: I6adf71479c30f5b6751a21edc4bfa311ddbef5ec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41128
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/picasso/include/soc/iomap.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/amd/picasso/include/soc/iomap.h b/src/soc/amd/picasso/include/soc/iomap.h index 77664663e7..bc2c964c63 100644 --- a/src/soc/amd/picasso/include/soc/iomap.h +++ b/src/soc/amd/picasso/include/soc/iomap.h @@ -63,11 +63,12 @@ #define ACPI_PM1_STS (ACPI_PM_EVT_BLK + 0x00) /* 2 bytes */ #define ACPI_PM1_EN (ACPI_PM_EVT_BLK + 0x02) /* 2 bytes */ #define ACPI_PM1_CNT_BLK (PICASSO_ACPI_IO_BASE + 0x04) /* 2 bytes */ -#define ACPI_CPU_CONTROL (PICASSO_ACPI_IO_BASE + 0x08) /* 6 bytes */ -#define ACPI_GPE0_BLK (PICASSO_ACPI_IO_BASE + 0x10) /* 8 bytes */ +#define ACPI_PM_TMR_BLK (PICASSO_ACPI_IO_BASE + 0x08) /* 4 bytes */ +#define ACPI_CPU_CONTROL (PICASSO_ACPI_IO_BASE + 0x0c) /* 6 bytes */ +/* doc says 0x14 for GPE0_BLK but FT5 only works with 0x20 */ +#define ACPI_GPE0_BLK (PICASSO_ACPI_IO_BASE + 0x20) /* 8 bytes */ #define ACPI_GPE0_STS (ACPI_GPE0_BLK + 0x00) /* 4 bytes */ #define ACPI_GPE0_EN (ACPI_GPE0_BLK + 0x04) /* 4 bytes */ -#define ACPI_PM_TMR_BLK (PICASSO_ACPI_IO_BASE + 0x18) /* 4 bytes */ #define NCP_ERR 0xf0 #define SMB_BASE_ADDR 0xb00 #define PM2_INDEX 0xcd0 |