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authorRaul E Rangel <rrangel@chromium.org>2021-05-04 16:48:25 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-05-06 23:27:50 +0000
commitafe1fe55eb346cc5bee097dee75f5ccbe3b62df4 (patch)
treeb7ddf605edc4b6f540824c5e4a5afdd22ee3ca05 /src/soc/amd
parentc8cfe7c8ff875bbb4059d86bf0af70ab8b777ec8 (diff)
soc/amd/{common/picasso}: Move pci_int.asl
We can share this with cezanne. BUG=b:184766519 TEST=Build picasso Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: If746d55345f6b7c828376b64adc5532d20413f68 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52916 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/common/acpi/pci_int.asl (renamed from src/soc/amd/picasso/acpi/pci_int.asl)0
-rw-r--r--src/soc/amd/picasso/acpi/soc.asl2
2 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/acpi/pci_int.asl b/src/soc/amd/common/acpi/pci_int.asl
index 06ba0ccbf7..06ba0ccbf7 100644
--- a/src/soc/amd/picasso/acpi/pci_int.asl
+++ b/src/soc/amd/common/acpi/pci_int.asl
diff --git a/src/soc/amd/picasso/acpi/soc.asl b/src/soc/amd/picasso/acpi/soc.asl
index b411c20ba4..e8c78e1d19 100644
--- a/src/soc/amd/picasso/acpi/soc.asl
+++ b/src/soc/amd/picasso/acpi/soc.asl
@@ -9,7 +9,7 @@ Device(PCI0) {
}
/* Describe PCI INT[A-H] for the Southbridge */
-#include "pci_int.asl"
+#include <soc/amd/common/acpi/pci_int.asl>
/* Describe the devices in the Southbridge */
#include "sb_fch.asl"