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authorFelix Held <felix-coreboot@felixheld.de>2023-12-06 23:40:42 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-12-11 10:42:50 +0000
commit6c00a6afc245741520c157372c8f773cf1b47f7c (patch)
tree44bd1d1f4068799d61c5c20d7c23e37c18282c82 /src/soc/amd
parent7ae510093c97ffbc7886503c7d6b839e9ee3b9ce (diff)
soc/amd/common/data_fabric: pass PCI segment group to domain code
Return the PCI segment group number from data_fabric_get_pci_bus_numbers via pointer argument so that amd_pci_domain_scan_bus can handle the PCI segment group numbers once coreboot supports more than one PCI segment group. For now, just print an error and return if the buses are on a PCI segment group other than 0. TEST=Mandolin still boots Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia53cda0ba656201c2197d05bc0d4a8fbbe8ad5d9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79412 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/common/block/data_fabric/domain.c10
-rw-r--r--src/soc/amd/common/block/data_fabric/pci_segment_multi.c12
-rw-r--r--src/soc/amd/common/block/data_fabric/pci_segment_single.c5
-rw-r--r--src/soc/amd/common/block/include/amdblocks/data_fabric.h4
4 files changed, 16 insertions, 15 deletions
diff --git a/src/soc/amd/common/block/data_fabric/domain.c b/src/soc/amd/common/block/data_fabric/domain.c
index 4ec52fcbd8..39f57902e4 100644
--- a/src/soc/amd/common/block/data_fabric/domain.c
+++ b/src/soc/amd/common/block/data_fabric/domain.c
@@ -14,13 +14,19 @@
void amd_pci_domain_scan_bus(struct device *domain)
{
- uint8_t bus, limit;
+ uint8_t segment_group, bus, limit;
- if (data_fabric_get_pci_bus_numbers(domain, &bus, &limit) != CB_SUCCESS) {
+ if (data_fabric_get_pci_bus_numbers(domain, &segment_group, &bus, &limit) != CB_SUCCESS) {
printk(BIOS_ERR, "No PCI bus numbers decoded to PCI root.\n");
return;
}
+ /* TODO: Implement support for more than one PCI segment group in coreboot */
+ if (segment_group) {
+ printk(BIOS_ERR, "coreboot currently only supports one PCI segment group.\n");
+ return;
+ }
+
/* TODO: Check if bus >= CONFIG_ECAM_MMCONF_BUS_NUMBER and return in that case */
/* Make sure to not report more than CONFIG_ECAM_MMCONF_BUS_NUMBER PCI buses */
diff --git a/src/soc/amd/common/block/data_fabric/pci_segment_multi.c b/src/soc/amd/common/block/data_fabric/pci_segment_multi.c
index fe39aa5051..bc680f9fff 100644
--- a/src/soc/amd/common/block/data_fabric/pci_segment_multi.c
+++ b/src/soc/amd/common/block/data_fabric/pci_segment_multi.c
@@ -6,8 +6,8 @@
#include <device/device.h>
#include <types.h>
-enum cb_err data_fabric_get_pci_bus_numbers(struct device *domain, uint8_t *first_bus,
- uint8_t *last_bus)
+enum cb_err data_fabric_get_pci_bus_numbers(struct device *domain, uint8_t *segment_group,
+ uint8_t *first_bus, uint8_t *last_bus)
{
const signed int iohc_dest_fabric_id = get_iohc_fabric_id(domain);
union df_pci_cfg_base pci_bus_base;
@@ -21,13 +21,7 @@ enum cb_err data_fabric_get_pci_bus_numbers(struct device *domain, uint8_t *firs
continue;
if (pci_bus_base.we && pci_bus_base.re) {
- /* TODO: Implement support for multiple PCI segments in coreboot */
- if (pci_bus_base.segment_num) {
- printk(BIOS_ERR, "DF PCI CFG register pair %d uses bus "
- "segment != 0.\n", i);
- return CB_ERR;
- }
-
+ *segment_group = pci_bus_base.segment_num;
*first_bus = pci_bus_base.bus_num_base;
*last_bus = pci_bus_limit.bus_num_limit;
return CB_SUCCESS;
diff --git a/src/soc/amd/common/block/data_fabric/pci_segment_single.c b/src/soc/amd/common/block/data_fabric/pci_segment_single.c
index 02a02056d6..3e02d96148 100644
--- a/src/soc/amd/common/block/data_fabric/pci_segment_single.c
+++ b/src/soc/amd/common/block/data_fabric/pci_segment_single.c
@@ -6,8 +6,8 @@
#include <device/device.h>
#include <types.h>
-enum cb_err data_fabric_get_pci_bus_numbers(struct device *domain, uint8_t *first_bus,
- uint8_t *last_bus)
+enum cb_err data_fabric_get_pci_bus_numbers(struct device *domain, uint8_t *segment_group,
+ uint8_t *first_bus, uint8_t *last_bus)
{
const signed int iohc_dest_fabric_id = get_iohc_fabric_id(domain);
union df_pci_cfg_map pci_bus_map;
@@ -19,6 +19,7 @@ enum cb_err data_fabric_get_pci_bus_numbers(struct device *domain, uint8_t *firs
continue;
if (pci_bus_map.we && pci_bus_map.re) {
+ *segment_group = 0;
*first_bus = pci_bus_map.bus_num_base;
*last_bus = pci_bus_map.bus_num_limit;
return CB_SUCCESS;
diff --git a/src/soc/amd/common/block/include/amdblocks/data_fabric.h b/src/soc/amd/common/block/include/amdblocks/data_fabric.h
index 4381506242..3a08a2011c 100644
--- a/src/soc/amd/common/block/include/amdblocks/data_fabric.h
+++ b/src/soc/amd/common/block/include/amdblocks/data_fabric.h
@@ -49,8 +49,8 @@ void data_fabric_broadcast_write32(uint16_t fn_reg, uint32_t data)
void data_fabric_print_mmio_conf(void);
void data_fabric_set_mmio_np(void);
-enum cb_err data_fabric_get_pci_bus_numbers(struct device *domain, uint8_t *first_bus,
- uint8_t *last_bus);
+enum cb_err data_fabric_get_pci_bus_numbers(struct device *domain, uint8_t *segment_group,
+ uint8_t *first_bus, uint8_t *last_bus);
void data_fabric_get_mmio_base_size(unsigned int reg, resource_t *mmio_base,
resource_t *mmio_limit);