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authorKarthikeyan Ramasubramanian <kramasub@google.com>2022-03-16 16:27:49 -0600
committerRaul Rangel <rrangel@chromium.org>2022-03-23 16:13:42 +0000
commit1a24d845663d682ff2f89d5848bdd9e0edcded2f (patch)
tree1bb36d693235501a75e9a76008b495d6c618e6b3 /src/soc/amd
parent2bd4c98c42c63883fc5bca9e687d5f5fb7776ccb (diff)
soc/amd/common/psp_verstage: Write postcodes after ESPI init
On boards where PSP uses ESPI to write postcodes, update the verstage to do it after ESPI initialization. BUG=b:224543620 TEST=Build and boot to OS in Nipperkin. Ensure that there are no attempts to write the post code from PSP verstage before ESPI initialization. Change-Id: I1b78931c741c75dc845c9b34e3b2b896221f2364 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62880 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mohan Viswanathan Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/cezanne/Kconfig8
-rw-r--r--src/soc/amd/common/psp_verstage/psp_verstage.c11
2 files changed, 16 insertions, 3 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 81cf9748c6..48944c858f 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -345,6 +345,14 @@ config PSP_DISABLE_POSTCODES
help
Disables the output of port80 post codes from PSP.
+config PSP_POSTCODES_ON_ESPI
+ bool "Use eSPI bus for PSP post codes"
+ depends on !PSP_DISABLE_POSTCODES
+ default y
+ help
+ Select to send PSP port80 post codes on eSPI bus.
+ If not selected, PSP port80 codes will be sent on LPC bus.
+
config PSP_INIT_ESPI
bool "Initialize eSPI in PSP Stage 2 Boot Loader"
help
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c
index 9d0fb2259a..d64c257edf 100644
--- a/src/soc/amd/common/psp_verstage/psp_verstage.c
+++ b/src/soc/amd/common/psp_verstage/psp_verstage.c
@@ -206,16 +206,21 @@ void Main(void)
/*
* Do not use printk() before console_init()
* Do not use post_code() before verstage_mainboard_init()
+ * Do not use svc_write_postcode before verstage_soc_espi_init() if PSP uses ESPI
+ * to write postcodes.
*/
timestamp_init(timestamp_get());
- svc_write_postcode(POSTCODE_ENTERED_PSP_VERSTAGE);
+ if (!CONFIG(PSP_POSTCODES_ON_ESPI))
+ svc_write_postcode(POSTCODE_ENTERED_PSP_VERSTAGE);
svc_debug_print("Entering verstage on PSP\n");
memset(&_bss_start, '\0', &_bss_end - &_bss_start);
- svc_write_postcode(POSTCODE_CONSOLE_INIT);
+ if (!CONFIG(PSP_POSTCODES_ON_ESPI))
+ svc_write_postcode(POSTCODE_CONSOLE_INIT);
console_init();
- svc_write_postcode(POSTCODE_EARLY_INIT);
+ if (!CONFIG(PSP_POSTCODES_ON_ESPI))
+ svc_write_postcode(POSTCODE_EARLY_INIT);
retval = verstage_soc_early_init();
if (retval) {
/*