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authorSergii Dmytruk <sergii.dmytruk@3mdeb.com>2022-10-31 18:41:52 +0200
committerMartin L Roth <gaumless@gmail.com>2024-03-28 15:16:19 +0000
commit094a051732341d20e82c349ea10f85faea6e58d1 (patch)
treea6da34deaf0607885577218e0fb950f1bec18034 /src/soc/amd
parentfebf9b9f24f537b88ea5d4845a8d350d94d9e295 (diff)
security/tpm: resolve conflicts in TSS implementations
No functional changes. Refactor code such that there won't be any compiler or linker errors if TSS 1.2 and TSS 2.0 were both compiled in. One might want to support both TPM families for example if TPM is pluggable, while currently one has to reflash firmware along with switching TPM device. Change-Id: Ia0ea5a917c46ada9fc3274f17240e12bca98db6a Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/common/psp_verstage/psp_verstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c
index b49acae843..0b09c5fae9 100644
--- a/src/soc/amd/common/psp_verstage/psp_verstage.c
+++ b/src/soc/amd/common/psp_verstage/psp_verstage.c
@@ -227,9 +227,9 @@ static void psp_verstage_s0i3_resume(void)
reboot_into_recovery(vboot_get_context(), POSTCODE_INIT_TPM_FAILED);
}
- rc = tlcl_disable_platform_hierarchy();
+ rc = tlcl2_disable_platform_hierarchy();
if (rc != TPM_SUCCESS) {
- printk(BIOS_ERR, "tlcl_disable_platform_hierarchy failed rc:%d\n", rc);
+ printk(BIOS_ERR, "tlcl2_disable_platform_hierarchy failed rc:%d\n", rc);
reboot_into_recovery(vboot_get_context(), POSTCODE_INIT_TPM_FAILED);
}
}