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authorRaul E Rangel <rrangel@chromium.org>2021-02-11 11:07:11 -0700
committerMartin Roth <martinroth@google.com>2021-02-12 20:45:59 +0000
commitffab5e64d185cebfbc35e3959382910ddd5ddce8 (patch)
tree4f2b1b71d82802268ceee248f6b13a7b2cbff511 /src/soc/amd
parent1c88b10be277bb65ebf3f4ff12361c53eb054e01 (diff)
soc/amd: Move MADT IRQ override settings into common_config
This is another common ACPI setting. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Iefecabae1d83996a9a4aaadd2a53c2432441e1b2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50558 Reviewed-by: Mathew King <mathewk@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/common/block/acpi/tables.c22
-rw-r--r--src/soc/amd/common/block/include/amdblocks/acpi.h2
-rw-r--r--src/soc/amd/common/block/include/amdblocks/chip.h11
-rw-r--r--src/soc/amd/picasso/acpi.c16
-rw-r--r--src/soc/amd/picasso/chip.h11
5 files changed, 36 insertions, 26 deletions
diff --git a/src/soc/amd/common/block/acpi/tables.c b/src/soc/amd/common/block/acpi/tables.c
index f941bc94a0..88ff252b26 100644
--- a/src/soc/amd/common/block/acpi/tables.c
+++ b/src/soc/amd/common/block/acpi/tables.c
@@ -2,6 +2,7 @@
#include <acpi/acpi.h>
#include <amdblocks/acpi.h>
+#include <amdblocks/chip.h>
#include <device/device.h>
#include <types.h>
@@ -23,3 +24,24 @@ unsigned long acpi_fill_mcfg(unsigned long current)
return current;
}
+
+unsigned long acpi_fill_madt_irqoverride(unsigned long current)
+{
+ const struct soc_amd_common_config *cfg = soc_get_common_config();
+ unsigned int i;
+ uint8_t irq;
+ uint8_t flags;
+
+ for (i = 0; i < ARRAY_SIZE(cfg->irq_override); ++i) {
+ irq = cfg->irq_override[i].irq;
+ flags = cfg->irq_override[i].flags;
+
+ if (!flags)
+ continue;
+
+ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, 0,
+ irq, irq, flags);
+ }
+
+ return current;
+}
diff --git a/src/soc/amd/common/block/include/amdblocks/acpi.h b/src/soc/amd/common/block/include/amdblocks/acpi.h
index badc77bb9f..e6e2520412 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpi.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpi.h
@@ -51,4 +51,6 @@ struct chipset_power_state {
unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current,
struct acpi_rsdp *rsdp);
+unsigned long acpi_fill_madt_irqoverride(unsigned long current);
+
#endif /* AMD_BLOCK_ACPI_H */
diff --git a/src/soc/amd/common/block/include/amdblocks/chip.h b/src/soc/amd/common/block/include/amdblocks/chip.h
index b365e4d5d0..e18ce64265 100644
--- a/src/soc/amd/common/block/include/amdblocks/chip.h
+++ b/src/soc/amd/common/block/include/amdblocks/chip.h
@@ -24,6 +24,17 @@ struct soc_amd_common_config {
/* Options for these are in src/include/acpi/acpi.h */
uint16_t fadt_boot_arch;
uint32_t fadt_flags;
+
+ /**
+ * IRQ 0 - 15 have a default trigger of edge and default polarity of high.
+ * If you have a device that requires a different configuration you can override the
+ * settings here.
+ */
+ struct {
+ uint8_t irq;
+ /* See MP_IRQ_* from mpspec.h */
+ uint8_t flags;
+ } irq_override[16];
};
/*
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index a6bc97b361..8697e79dd2 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -32,11 +32,6 @@
unsigned long acpi_fill_madt(unsigned long current)
{
- const struct soc_amd_picasso_config *cfg = config_of_soc();
- unsigned int i;
- uint8_t irq;
- uint8_t flags;
-
/* create all subtables for processors */
current = acpi_create_madt_lapics(current);
@@ -56,16 +51,7 @@ unsigned long acpi_fill_madt(unsigned long current)
(acpi_madt_irqoverride_t *)current, 0, 9, 9,
MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
- for (i = 0; i < ARRAY_SIZE(cfg->irq_override); ++i) {
- irq = cfg->irq_override[i].irq;
- flags = cfg->irq_override[i].flags;
-
- if (!flags)
- continue;
-
- current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, 0,
- irq, irq, flags);
- }
+ current = acpi_fill_madt_irqoverride(current);
/* create all subtables for processors */
current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current,
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index a66d77c89e..549f03347a 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -120,17 +120,6 @@ struct soc_amd_picasso_config {
/* Enable ACP PME (0 = disable, 1 = enable) */
u8 acp_pme_enable;
- /**
- * IRQ 0 - 15 have a default trigger of edge and default polarity of high.
- * If you have a device that requires a different configuration you can override the
- * settings here.
- */
- struct {
- uint8_t irq;
- /* See MP_IRQ_* from mpspec.h */
- uint8_t flags;
- } irq_override[16];
-
/* System config index */
uint8_t system_config;