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authorWim Vervoorn <wvervoorn@eltan.com>2020-05-01 13:50:08 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-18 07:11:24 +0000
commit30e9149c4fd716a8213cf0b5383774eecdb81829 (patch)
tree095961f82ace5572b07cf34a463683a62e9c0bb1 /src/soc/amd
parent544cc834700590c6c804150f1db81ee31a3bbd30 (diff)
soc/intel/common/block/smbus: Use i2c read eeprom to speedup SPD read
Reading the SPD using the SMBUS routines takes a long time because each byte or word is access seperately. Allow using the i2c read eeprom routines to read the SPD. By doing this the start address is only sent once per page. The time required to read a DDR4 SPD is reduced from 200 msec to 50 msec. BUG=N/A TEST=tested on facebook monolith Change-Id: I44e18b8ba72e1b2321f83402a6a055e2be6f940c Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40942 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/soc/amd')
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