diff options
author | Raul E Rangel <rrangel@chromium.org> | 2021-02-10 16:36:33 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2021-02-12 20:44:48 +0000 |
commit | 0f3bc81210f364a6e96edd090d9310844aa30aa2 (patch) | |
tree | 98ed030848ddb46c2cf03cdd7b221d1c7fc153d9 /src/soc/amd | |
parent | 48c99db6d6af3bf642866646b915bc5a57dcb4a5 (diff) |
soc/amd: Move southbridge_write_acpi_tables
This is common between all the chipsets.
It's also required by common/block/lpc/lpc.c.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I361dfabfe0c04667a2c112955133831a985d5cc0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50509
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r-- | src/soc/amd/common/block/acpi/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/amd/common/block/acpi/tables.c | 13 | ||||
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/acpi.h | 6 | ||||
-rw-r--r-- | src/soc/amd/common/block/lpc/lpc.c | 2 | ||||
-rw-r--r-- | src/soc/amd/picasso/acpi.c | 7 | ||||
-rw-r--r-- | src/soc/amd/picasso/include/soc/acpi.h | 3 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/acpi.c | 7 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/include/soc/acpi.h | 3 |
8 files changed, 20 insertions, 22 deletions
diff --git a/src/soc/amd/common/block/acpi/Makefile.inc b/src/soc/amd/common/block/acpi/Makefile.inc index c6a4725b85..3f5d47a1ff 100644 --- a/src/soc/amd/common/block/acpi/Makefile.inc +++ b/src/soc/amd/common/block/acpi/Makefile.inc @@ -8,5 +8,6 @@ postcar-y += acpi.c smm-y += acpi.c ramstage-y += pm_state.c +ramstage-y += tables.c endif # CONFIG_SOC_AMD_COMMON_BLOCK_ACPI diff --git a/src/soc/amd/common/block/acpi/tables.c b/src/soc/amd/common/block/acpi/tables.c new file mode 100644 index 0000000000..fd1f37f872 --- /dev/null +++ b/src/soc/amd/common/block/acpi/tables.c @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +#include <amdblocks/acpi.h> +#include <device/device.h> +#include <types.h> + +unsigned long southbridge_write_acpi_tables(const struct device *device, + unsigned long current, + struct acpi_rsdp *rsdp) +{ + return acpi_write_hpet(device, current, rsdp); +} diff --git a/src/soc/amd/common/block/include/amdblocks/acpi.h b/src/soc/amd/common/block/include/amdblocks/acpi.h index aa40706f96..badc77bb9f 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpi.h +++ b/src/soc/amd/common/block/include/amdblocks/acpi.h @@ -3,8 +3,9 @@ #ifndef AMD_BLOCK_ACPI_H #define AMD_BLOCK_ACPI_H -#include <types.h> +#include <acpi/acpi.h> #include <amdblocks/gpio_banks.h> +#include <types.h> /* ACPI MMIO registers 0xfed80800 */ #define MMIO_ACPI_PM1_STS 0x00 @@ -47,4 +48,7 @@ struct chipset_power_state { struct gpio_wake_state gpio_state; }; +unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current, + struct acpi_rsdp *rsdp); + #endif /* AMD_BLOCK_ACPI_H */ diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c index d68814ba9f..bffb9d456c 100644 --- a/src/soc/amd/common/block/lpc/lpc.c +++ b/src/soc/amd/common/block/lpc/lpc.c @@ -12,10 +12,10 @@ #include <arch/ioapic.h> #include <pc80/i8254.h> #include <pc80/i8259.h> +#include <amdblocks/acpi.h> #include <amdblocks/acpimmio.h> #include <amdblocks/espi.h> #include <amdblocks/lpc.h> -#include <soc/acpi.h> #include <soc/iomap.h> #include <soc/lpc.h> #include <soc/southbridge.h> diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 2f08dce852..f1698442fa 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -390,13 +390,6 @@ void generate_cpu_entries(const struct device *device) acpigen_pop_len(); } -unsigned long southbridge_write_acpi_tables(const struct device *device, - unsigned long current, - struct acpi_rsdp *rsdp) -{ - return acpi_write_hpet(device, current, rsdp); -} - void soc_fill_gnvs(struct global_nvs *gnvs) { /* Set unknown wake source */ diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h index 5ee70b0637..254e5d909e 100644 --- a/src/soc/amd/picasso/include/soc/acpi.h +++ b/src/soc/amd/picasso/include/soc/acpi.h @@ -8,9 +8,6 @@ #include <device/device.h> #include <stdint.h> -unsigned long southbridge_write_acpi_tables(const struct device *device, - unsigned long current, struct acpi_rsdp *rsdp); - uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp); diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index af3bf1292a..e9c56bc80d 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -158,13 +158,6 @@ void generate_cpu_entries(const struct device *device) acpigen_pop_len(); } -unsigned long southbridge_write_acpi_tables(const struct device *device, - unsigned long current, - struct acpi_rsdp *rsdp) -{ - return acpi_write_hpet(device, current, rsdp); -} - void soc_fill_gnvs(struct global_nvs *gnvs) { /* Set unknown wake source */ diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h index 4eb7f359ec..f0c35c070c 100644 --- a/src/soc/amd/stoneyridge/include/soc/acpi.h +++ b/src/soc/amd/stoneyridge/include/soc/acpi.h @@ -12,9 +12,6 @@ #define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042) #endif -unsigned long southbridge_write_acpi_tables(const struct device *device, - unsigned long current, struct acpi_rsdp *rsdp); - const char *soc_acpi_name(const struct device *dev); #endif /* AMD_STONEYRIDGE_ACPI_H */ |