soc/amd/common: Refactor SMBus base arguments

Replace SMBus base addresses with proper symbols.

Change-Id: I5e0ebd7609c5c83d0e443ffba74dae68017d3ebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42074
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

4 files changed, 20 insertions, 34 deletions

diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
index abf014c325..69cc57a752 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
@@ -126,10 +126,6 @@
 #define ACPIMMIO_ACDCTMR_BANK		0x1d00
 #define ACPIMMIO_AOAC_BANK		0x1e00
 
-/* FIXME: Passing host base for SMBUS is not long-term solution. */
-#define ACPIMMIO_ASF_BASE	(AMD_SB_ACPI_MMIO_ADDR + ACPIMMIO_ASF_BANK)
-#define ACPIMMIO_SMBUS_BASE	(AMD_SB_ACPI_MMIO_ADDR + ACPIMMIO_SMBUS_BANK)
-
 #endif
 
 #endif /* AMD_BLOCK_ACPIMMIO_MAP_H */
diff --git a/src/soc/amd/common/block/smbus/sm.c b/src/soc/amd/common/block/smbus/sm.c
index c5c1ed8990..28e662c650 100644
--- a/src/soc/amd/common/block/smbus/sm.c
+++ b/src/soc/amd/common/block/smbus/sm.c
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <amdblocks/acpimmio_map.h>
+#include <amdblocks/acpimmio.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -27,9 +27,9 @@ static u32 get_sm_mmio(struct device *dev)
 	pbus = get_pbus_smbus(dev);
 	res = find_resource(pbus->dev, 0x90);
 	if (res->base == SMB_BASE_ADDR)
-		return ACPIMMIO_SMBUS_BASE;
+		return (uintptr_t)acpimmio_smbus;
 
-	return ACPIMMIO_ASF_BASE;
+	return (uintptr_t)acpimmio_asf;
 }
 
 static int lsmbus_recv_byte(struct device *dev)
diff --git a/src/soc/amd/common/block/smbus/smbus.c b/src/soc/amd/common/block/smbus/smbus.c
index 4fb68d425d..9fd18c5987 100644
--- a/src/soc/amd/common/block/smbus/smbus.c
+++ b/src/soc/amd/common/block/smbus/smbus.c
@@ -4,8 +4,8 @@
 #include <console/console.h>
 #include <device/smbus_host.h>
 #include <amdblocks/acpimmio.h>
-#include <amdblocks/acpimmio_map.h>
 #include <amdblocks/smbus.h>
+#include <soc/southbridge.h>
 
 /*
  * Between 1-10 seconds, We should never timeout normally
@@ -13,37 +13,27 @@
  */
 #define SMBUS_TIMEOUT (100 * 1000 * 10)
 
-static u8 controller_read8(uintptr_t base, u8 reg)
+/* FIXME: Passing host base for SMBUS is not long-term solution.
+   It is possible to have multiple buses behind same host. */
+
+static u8 controller_read8(const uintptr_t base, const u8 reg)
 {
-	switch (base) {
-	case ACPIMMIO_SMBUS_BASE:
-		return smbus_read8(reg);
-	case ACPIMMIO_ASF_BASE:
-		return asf_read8(reg);
-	default:
-		printk(BIOS_ERR, "Error attempting to read SMBus at address 0x%lx\n",
-				base);
-	}
-	return 0xff;
+	return read8((void *)(base + reg));
 }
 
-static void controller_write8(uintptr_t base, u8 reg, u8 val)
+static void controller_write8(const uintptr_t base, const u8 reg, const u8 val)
 {
-	switch (base) {
-	case ACPIMMIO_SMBUS_BASE:
-		smbus_write8(reg, val);
-		break;
-	case ACPIMMIO_ASF_BASE:
-		asf_write8(reg, val);
-		break;
-	default:
-		printk(BIOS_ERR, "Error attempting to write SMBus at address 0x%lx\n",
-				base);
-	}
+	write8((void *)(base + reg), val);
 }
 
 static int smbus_wait_until_ready(uintptr_t mmio)
 {
+	if ((mmio != (uintptr_t)acpimmio_smbus) &&
+	   (mmio != (uintptr_t)acpimmio_asf)) {
+		printk(BIOS_ERR, "Invalid SMBus or ASF base %#zx\n", mmio);
+		return -1;
+	}
+
 	u32 loops;
 	loops = SMBUS_TIMEOUT;
 	do {
diff --git a/src/soc/amd/stoneyridge/smbus_spd.c b/src/soc/amd/stoneyridge/smbus_spd.c
index 7c54d8dcb2..773aad19f4 100644
--- a/src/soc/amd/stoneyridge/smbus_spd.c
+++ b/src/soc/amd/stoneyridge/smbus_spd.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/agesawrapper.h>
-#include <amdblocks/acpimmio_map.h>
+#include <amdblocks/acpimmio.h>
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <device/device.h>
@@ -34,7 +34,7 @@ static int readspd(uint8_t SmbusSlaveAddress, char *buffer, size_t count)
 	dev_addr = (SmbusSlaveAddress >> 1);
 
 	/* Read the first SPD byte */
-	error = do_smbus_read_byte(ACPIMMIO_SMBUS_BASE, dev_addr, 0);
+	error = do_smbus_read_byte((uintptr_t)acpimmio_smbus, dev_addr, 0);
 	if (error < 0) {
 		printk(BIOS_ERR, "-------------SPD READ ERROR-----------\n");
 		return error;
@@ -44,7 +44,7 @@ static int readspd(uint8_t SmbusSlaveAddress, char *buffer, size_t count)
 
 	/* Read the remaining SPD bytes using do_smbus_recv_byte for speed */
 	for (index = 1 ; index < count ; index++) {
-		error = do_smbus_recv_byte(ACPIMMIO_SMBUS_BASE, dev_addr);
+		error = do_smbus_recv_byte((uintptr_t)acpimmio_smbus, dev_addr);
 		if (error < 0) {
 			printk(BIOS_ERR, "-------------SPD READ ERROR-----------\n");
 			return error;