soc/amd/picasso: Update coreboot UPD variable names to include units

Use command below to change the variable globally.

sed -i "s/\<variable\>/variable_u/g" `grep variable -rl ./ \
   --exclude-dir=build --exclude-dir=crossgcc`

BUG=b:171334623
TEST=Build

Change-Id: I056a76663e84ebc940343d64178c18cb20df01a3
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

3 files changed, 50 insertions, 50 deletions

diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 3098a817a7..9d8fb8e70a 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -102,22 +102,22 @@ struct soc_amd_picasso_config {
 	uint8_t system_config;
 
 	/* STAPM Configuration */
-	uint32_t fast_ppt_limit;
-	uint32_t slow_ppt_limit;
-	uint32_t slow_ppt_time_constant;
-	uint32_t stapm_time_constant;
-	uint32_t sustained_power_limit;
+	uint32_t fast_ppt_limit_mW;
+	uint32_t slow_ppt_limit_mW;
+	uint32_t slow_ppt_time_constant_s;
+	uint32_t stapm_time_constant_s;
+	uint32_t sustained_power_limit_mW;
 
 	/* Enable dptc for tablet mode (0 = disable, 1 = enable) */
 	uint8_t dptc_enable;
 
 	/* STAPM Configuration for tablet mode (need enable dptc_enable first) */
-	uint32_t fast_ppt_limit_tablet_mode;
-	uint32_t slow_ppt_limit_tablet_mode;
-	uint32_t sustained_power_limit_tablet_mode;
+	uint32_t fast_ppt_limit_tablet_mode_mW;
+	uint32_t slow_ppt_limit_tablet_mode_mW;
+	uint32_t sustained_power_limit_tablet_mode_mW;
 
 	/* PROCHOT_L de-assertion Ramp Time */
-	uint32_t prochot_l_deassertion_ramp_time;
+	uint32_t prochot_l_deassertion_ramp_time_ms;
 
 	enum {
 		DOWNCORE_AUTO = 0,
@@ -128,29 +128,29 @@ struct soc_amd_picasso_config {
 	uint8_t smt_disable; /* 1=disable SMT, 0=enable SMT */
 
 	/* Lower die temperature limit */
-	uint32_t thermctl_limit;
-	uint32_t thermctl_limit_tablet_mode;
+	uint32_t thermctl_limit_degreeC;
+	uint32_t thermctl_limit_tablet_mode_degreeC;
 
 	/* FP5 Processor Voltage Supply PSI Currents. 0 indicates use SOC default */
-	uint32_t psi0_current_limit;
-	uint32_t psi0_soc_current_limit;
-	uint32_t vddcr_soc_voltage_margin;
-	uint32_t vddcr_vdd_voltage_margin;
+	uint32_t psi0_current_limit_mA;
+	uint32_t psi0_soc_current_limit_mA;
+	uint32_t vddcr_soc_voltage_margin_mV;
+	uint32_t vddcr_vdd_voltage_margin_mV;
 
 	/* VRM Limits. 0 indicates use SOC default */
-	uint32_t vrm_maximum_current_limit;
-	uint32_t vrm_soc_maximum_current_limit;
-	uint32_t vrm_current_limit;
-	uint32_t vrm_soc_current_limit;
+	uint32_t vrm_maximum_current_limit_mA;
+	uint32_t vrm_soc_maximum_current_limit_mA;
+	uint32_t vrm_current_limit_mA;
+	uint32_t vrm_soc_current_limit_mA;
 
 	/* Misc SMU settings */
 	uint8_t sb_tsi_alert_comparator_mode_en;
 	uint8_t core_dldo_bypass;
 	uint8_t min_soc_vid_offset;
 	uint8_t aclk_dpm0_freq_400MHz;
-	uint32_t telemetry_vddcr_vdd_slope;
+	uint32_t telemetry_vddcr_vdd_slope_mA;
 	uint32_t telemetry_vddcr_vdd_offset;
-	uint32_t telemetry_vddcr_soc_slope;
+	uint32_t telemetry_vddcr_soc_slope_mA;
 	uint32_t telemetry_vddcr_soc_offset;
 
 	struct {
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index b96743101c..9be970ddac 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -105,37 +105,37 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 
 	mcfg->system_config = config->system_config;
 
-	if ((config->slow_ppt_limit) &&
-		(config->fast_ppt_limit) &&
-		(config->slow_ppt_time_constant) &&
-		(config->stapm_time_constant)) {
-		mcfg->slow_ppt_limit = config->slow_ppt_limit;
-		mcfg->fast_ppt_limit = config->fast_ppt_limit;
-		mcfg->slow_ppt_time_constant = config->slow_ppt_time_constant;
-		mcfg->stapm_time_constant = config->stapm_time_constant;
+	if ((config->slow_ppt_limit_mW) &&
+		(config->fast_ppt_limit_mW) &&
+		(config->slow_ppt_time_constant_s) &&
+		(config->stapm_time_constant_s)) {
+		mcfg->slow_ppt_limit_mW = config->slow_ppt_limit_mW;
+		mcfg->fast_ppt_limit_mW = config->fast_ppt_limit_mW;
+		mcfg->slow_ppt_time_constant_s = config->slow_ppt_time_constant_s;
+		mcfg->stapm_time_constant_s = config->stapm_time_constant_s;
 	}
 
 	mcfg->ccx_down_core_mode = config->downcore_mode;
 	mcfg->ccx_disable_smt = config->smt_disable;
 
-	mcfg->sustained_power_limit = config->sustained_power_limit;
-	mcfg->prochot_l_deassertion_ramp_time = config->prochot_l_deassertion_ramp_time;
-	mcfg->thermctl_limit = config->thermctl_limit;
-	mcfg->psi0_current_limit = config->psi0_current_limit;
-	mcfg->psi0_soc_current_limit = config->psi0_soc_current_limit;
-	mcfg->vddcr_soc_voltage_margin = config->vddcr_soc_voltage_margin;
-	mcfg->vddcr_vdd_voltage_margin = config->vddcr_vdd_voltage_margin;
-	mcfg->vrm_maximum_current_limit = config->vrm_maximum_current_limit;
-	mcfg->vrm_soc_maximum_current_limit = config->vrm_soc_maximum_current_limit;
-	mcfg->vrm_current_limit = config->vrm_current_limit;
-	mcfg->vrm_soc_current_limit = config->vrm_soc_current_limit;
+	mcfg->sustained_power_limit_mW = config->sustained_power_limit_mW;
+	mcfg->prochot_l_deassertion_ramp_time_ms = config->prochot_l_deassertion_ramp_time_ms;
+	mcfg->thermctl_limit_degreeC = config->thermctl_limit_degreeC;
+	mcfg->psi0_current_limit_mA = config->psi0_current_limit_mA;
+	mcfg->psi0_soc_current_limit_mA = config->psi0_soc_current_limit_mA;
+	mcfg->vddcr_soc_voltage_margin_mV = config->vddcr_soc_voltage_margin_mV;
+	mcfg->vddcr_vdd_voltage_margin_mV = config->vddcr_vdd_voltage_margin_mV;
+	mcfg->vrm_maximum_current_limit_mA = config->vrm_maximum_current_limit_mA;
+	mcfg->vrm_soc_maximum_current_limit_mA = config->vrm_soc_maximum_current_limit_mA;
+	mcfg->vrm_current_limit_mA = config->vrm_current_limit_mA;
+	mcfg->vrm_soc_current_limit_mA = config->vrm_soc_current_limit_mA;
 	mcfg->sb_tsi_alert_comparator_mode_en = config->sb_tsi_alert_comparator_mode_en;
 	mcfg->core_dldo_bypass = config->core_dldo_bypass;
 	mcfg->min_soc_vid_offset = config->min_soc_vid_offset;
 	mcfg->aclk_dpm0_freq_400MHz = config->aclk_dpm0_freq_400MHz;
-	mcfg->telemetry_vddcr_vdd_slope = config->telemetry_vddcr_vdd_slope;
+	mcfg->telemetry_vddcr_vdd_slope_mA = config->telemetry_vddcr_vdd_slope_mA;
 	mcfg->telemetry_vddcr_vdd_offset = config->telemetry_vddcr_vdd_offset;
-	mcfg->telemetry_vddcr_soc_slope = config->telemetry_vddcr_soc_slope;
+	mcfg->telemetry_vddcr_soc_slope_mA = config->telemetry_vddcr_soc_slope_mA;
 	mcfg->telemetry_vddcr_soc_offset = config->telemetry_vddcr_soc_offset;
 	mcfg->hd_audio_enable = devtree_hda_dev_enabled();
 	mcfg->sata_enable = devtree_sata_dev_enabled();
diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c
index 174cddc487..72a0974897 100644
--- a/src/soc/amd/picasso/root_complex.c
+++ b/src/soc/amd/picasso/root_complex.c
@@ -200,15 +200,15 @@ static void acipgen_dptci(void)
 	if (!config->dptc_enable)
 		return;
 
-	struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit,
-							config->sustained_power_limit,
-							config->fast_ppt_limit,
-							config->slow_ppt_limit);
+	struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit_degreeC,
+							config->sustained_power_limit_mW,
+							config->fast_ppt_limit_mW,
+							config->slow_ppt_limit_mW);
 	struct dptc_input tablet_mode_input = DPTC_INPUTS(
-					config->thermctl_limit_tablet_mode,
-					config->sustained_power_limit_tablet_mode,
-					config->fast_ppt_limit_tablet_mode,
-					config->slow_ppt_limit_tablet_mode);
+					config->thermctl_limit_tablet_mode_degreeC,
+					config->sustained_power_limit_tablet_mode_mW,
+					config->fast_ppt_limit_tablet_mode_mW,
+					config->slow_ppt_limit_tablet_mode_mW);
 	/* Scope (\_SB) */
 	acpigen_write_scope("\\_SB");