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authorElyes HAOUAS <ehaouas@noos.fr>2019-10-25 10:53:20 +0200
committerMartin Roth <martinroth@google.com>2019-11-29 19:23:05 +0000
commit01787608670adec26fcea48173e18395e51c790e (patch)
tree6a60df15f88244034578f80e92aa32725539fd53 /src/soc/amd
parent179da7fb5cff3c9034dc3203086c84342560c600 (diff)
{northbridge,soc,southbridge}: Don't use both of _ADR and _HID
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID object or an _ADR object, but should not contain both." Change-Id: Ifb777c09aeef09a6a4cbee254b081519f5b6c457 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36318 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/stoneyridge/acpi/northbridge.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl
index fe78534403..09bf2e18c2 100644
--- a/src/soc/amd/stoneyridge/acpi/northbridge.asl
+++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl
@@ -17,7 +17,7 @@
/* Note: Only need HID on Primary Bus */
External (TOM1)
External (TOM2)
-Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
+/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */