summaryrefslogtreecommitdiff
path: root/src/soc/amd
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2023-07-13 18:32:40 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-11-30 15:18:45 +0000
commitea2e210548c2267b1dab0ea5aba15c448bfd93fc (patch)
treed6d6b004e57f231571c04f992701d80bcf915fbb /src/soc/amd
parent98a46fb2dd2319b5971b57b345e0dddcf5c6880f (diff)
soc/amd/genoa: Implement romstage
The only thing romstage needs to do is find cbmem_top. TESTED: reaches ramstage. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: Ic2837c4a2b0ec8dcd9dd99602f9c073999c36139 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76514 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/genoa/romstage.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/src/soc/amd/genoa/romstage.c b/src/soc/amd/genoa/romstage.c
index f4c5584c30..66a2140c07 100644
--- a/src/soc/amd/genoa/romstage.c
+++ b/src/soc/amd/genoa/romstage.c
@@ -1,10 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <amdblocks/post_codes.h>
+#include <amdblocks/memmap.h>
+#include <cbmem.h>
+#include <program_loading.h>
#include <romstage_common.h>
-#include <halt.h>
void __noreturn romstage_main(void)
{
- /* Needed for __noreturn */
- halt();
+ post_code(POSTCODE_ROMSTAGE_MAIN);
+
+ cbmem_initialize_empty();
+ memmap_stash_early_dram_usage();
+ run_ramstage();
}