diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2022-04-19 14:32:38 -0600 |
|---|---|---|
| committer | Martin L Roth <martinroth@google.com> | 2022-04-24 18:36:37 +0000 |
| commit | d702a3492585003b55e6edc5f6e74e2879f59a16 (patch) | |
| tree | ed6aa7e3582820fe3907ec98949f357e03b095e2 /src/soc/amd | |
| parent | 0fa0a3e926b4556f0048f9a84a01613f99c43d4d (diff) | |
soc/amd/sabrina/psp_verstage: Add platform_report_boot_mode API
PSP verstage uses this API to report PSP regarding the platform boot
mode. PSP in turn uses the boot mode to either maintain or clean DRM
credentials.
BUG=None
TEST=Build Skyrim BIOS image with PSP verstage enabled.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: Ie13b42b349f5c77322d904b68d5f53a3aed58fc5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63730
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/sabrina/psp_verstage/chipset.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/amd/sabrina/psp_verstage/chipset.c b/src/soc/amd/sabrina/psp_verstage/chipset.c index e82a132830..7f86dbfebf 100644 --- a/src/soc/amd/sabrina/psp_verstage/chipset.c +++ b/src/soc/amd/sabrina/psp_verstage/chipset.c @@ -3,6 +3,7 @@ /* TODO: Check if this is still correct */ #include <bl_uapp/bl_syscall_public.h> +#include <console/console.h> #include <psp_verstage.h> uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) @@ -44,3 +45,13 @@ uint32_t svc_write_postcode(uint32_t postcode) { return 0; } + +void platform_report_mode(int developer_mode_enabled) +{ + printk(BIOS_INFO, "Reporting %s mode\n", + developer_mode_enabled ? "Developer" : "Normal"); + if (developer_mode_enabled) + svc_set_platform_boot_mode(CHROME_BOOK_BOOT_MODE_DEVELOPER); + else + svc_set_platform_boot_mode(CHROME_BOOK_BOOT_MODE_NORMAL); +} |