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authorArthur Heymans <arthur@aheymans.xyz>2022-10-05 21:48:07 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-14 20:19:03 +0000
commitc6f029cbccc7a1ae4f7463e5d519a32f0df100dd (patch)
treeb04ff319b00005b453621b492a24e4a5e3476f64 /src/soc/amd
parentfd2bb9b6bc06515f2a42a8575812271765f73313 (diff)
soc/amd/*: Hook up LPC ops in devicetree
This removes the need for a PCI driver. Change-Id: I6674d13f434cfa27fa6514623ba305af6681f70d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68144 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/cezanne/chipset.cb2
-rw-r--r--src/soc/amd/common/block/lpc/lpc.c16
-rw-r--r--src/soc/amd/mendocino/chipset_mendocino.cb2
-rw-r--r--src/soc/amd/mendocino/chipset_rembrandt.cb2
-rw-r--r--src/soc/amd/morgana/chipset.cb2
-rw-r--r--src/soc/amd/picasso/chipset.cb2
-rw-r--r--src/soc/amd/stoneyridge/chipset_cz.cb2
-rw-r--r--src/soc/amd/stoneyridge/chipset_st.cb2
8 files changed, 8 insertions, 22 deletions
diff --git a/src/soc/amd/cezanne/chipset.cb b/src/soc/amd/cezanne/chipset.cb
index f1cc81a44e..3a6ea4219e 100644
--- a/src/soc/amd/cezanne/chipset.cb
+++ b/src/soc/amd/cezanne/chipset.cb
@@ -95,7 +95,7 @@ chip soc/amd/cezanne
end
device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function
- device pci 14.3 alias lpc_bridge on end
+ device pci 14.3 alias lpc_bridge on ops amd_lpc_ops end
device pci 18.0 alias data_fabric_0 on ops cezanne_data_fabric_ops end
device pci 18.1 alias data_fabric_1 on ops cezanne_data_fabric_ops end
diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c
index 3d1b2d44fc..26e0c26ed9 100644
--- a/src/soc/amd/common/block/lpc/lpc.c
+++ b/src/soc/amd/common/block/lpc/lpc.c
@@ -5,7 +5,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pnp.h>
-#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <pc80/mc146818rtc.h>
@@ -319,7 +318,7 @@ static const char *lpc_acpi_name(const struct device *dev)
}
#endif
-static struct device_operations lpc_ops = {
+struct device_operations amd_lpc_ops = {
.read_resources = lpc_read_resources,
.set_resources = lpc_set_resources,
.enable_resources = lpc_enable_resources,
@@ -331,16 +330,3 @@ static struct device_operations lpc_ops = {
.scan_bus = scan_static_bus,
.ops_pci = &pci_dev_ops_pci,
};
-
-static const unsigned short pci_device_ids[] = {
- /* PCI device ID is used on all discrete FCHs and Family 16h Models 00h-3Fh */
- PCI_DID_AMD_SB900_LPC,
- /* PCI device ID is used on all integrated FCHs except Family 16h Models 00h-3Fh */
- PCI_DID_AMD_CZ_LPC,
- 0
-};
-static const struct pci_driver lpc_driver __pci_driver = {
- .ops = &lpc_ops,
- .vendor = PCI_VID_AMD,
- .devices = pci_device_ids,
-};
diff --git a/src/soc/amd/mendocino/chipset_mendocino.cb b/src/soc/amd/mendocino/chipset_mendocino.cb
index 707ff66164..c0472c536b 100644
--- a/src/soc/amd/mendocino/chipset_mendocino.cb
+++ b/src/soc/amd/mendocino/chipset_mendocino.cb
@@ -72,7 +72,7 @@ chip soc/amd/mendocino
end
device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function
- device pci 14.3 alias lpc_bridge on end
+ device pci 14.3 alias lpc_bridge on ops amd_lpc_ops end
device pci 18.0 alias data_fabric_0 on ops mendocino_data_fabric_ops end
device pci 18.1 alias data_fabric_1 on ops mendocino_data_fabric_ops end
diff --git a/src/soc/amd/mendocino/chipset_rembrandt.cb b/src/soc/amd/mendocino/chipset_rembrandt.cb
index 707ff66164..c0472c536b 100644
--- a/src/soc/amd/mendocino/chipset_rembrandt.cb
+++ b/src/soc/amd/mendocino/chipset_rembrandt.cb
@@ -72,7 +72,7 @@ chip soc/amd/mendocino
end
device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function
- device pci 14.3 alias lpc_bridge on end
+ device pci 14.3 alias lpc_bridge on ops amd_lpc_ops end
device pci 18.0 alias data_fabric_0 on ops mendocino_data_fabric_ops end
device pci 18.1 alias data_fabric_1 on ops mendocino_data_fabric_ops end
diff --git a/src/soc/amd/morgana/chipset.cb b/src/soc/amd/morgana/chipset.cb
index 25527d72f6..1bb89ed11f 100644
--- a/src/soc/amd/morgana/chipset.cb
+++ b/src/soc/amd/morgana/chipset.cb
@@ -74,7 +74,7 @@ chip soc/amd/morgana
end
device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function
- device pci 14.3 alias lpc_bridge on end
+ device pci 14.3 alias lpc_bridge on ops amd_lpc_ops end
device pci 18.0 alias data_fabric_0 on ops morgana_data_fabric_ops end
device pci 18.1 alias data_fabric_1 on ops morgana_data_fabric_ops end
diff --git a/src/soc/amd/picasso/chipset.cb b/src/soc/amd/picasso/chipset.cb
index cf6de84363..e56340dd55 100644
--- a/src/soc/amd/picasso/chipset.cb
+++ b/src/soc/amd/picasso/chipset.cb
@@ -35,7 +35,7 @@ chip soc/amd/picasso
device pci 0.2 alias xgbe_1 off end
end
device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function
- device pci 14.3 alias lpc_bridge on end
+ device pci 14.3 alias lpc_bridge on ops amd_lpc_ops end
device pci 14.6 alias sdhci off end
device pci 18.0 alias data_fabric_0 on ops picasso_data_fabric_ops end
device pci 18.1 alias data_fabric_1 on ops picasso_data_fabric_ops end
diff --git a/src/soc/amd/stoneyridge/chipset_cz.cb b/src/soc/amd/stoneyridge/chipset_cz.cb
index b55b7b6dd0..754f018772 100644
--- a/src/soc/amd/stoneyridge/chipset_cz.cb
+++ b/src/soc/amd/stoneyridge/chipset_cz.cb
@@ -29,7 +29,7 @@ chip soc/amd/stoneyridge
device pci 11.0 alias sata off end
device pci 12.0 alias ehci off ops stoneyridge_usb_ops end
device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function
- device pci 14.3 alias lpc_bridge on end
+ device pci 14.3 alias lpc_bridge on ops amd_lpc_ops end
device pci 14.7 alias sdhci off end
device pci 18.0 alias ht_0 on end
device pci 18.1 alias ht_1 on end
diff --git a/src/soc/amd/stoneyridge/chipset_st.cb b/src/soc/amd/stoneyridge/chipset_st.cb
index 743822b372..286bb8aba1 100644
--- a/src/soc/amd/stoneyridge/chipset_st.cb
+++ b/src/soc/amd/stoneyridge/chipset_st.cb
@@ -23,7 +23,7 @@ chip soc/amd/stoneyridge
device pci 11.0 alias sata off end
device pci 12.0 alias ehci off ops stoneyridge_usb_ops end
device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function
- device pci 14.3 alias lpc_bridge on end
+ device pci 14.3 alias lpc_bridge on ops amd_lpc_ops end
device pci 14.7 alias sdhci off end
device pci 18.0 alias ht_0 on end
device pci 18.1 alias ht_1 on end