diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-10-28 12:35:39 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-03 18:36:15 +0000 |
| commit | c435038c55e4a5db68df8e070e756d5a76a5b3ef (patch) | |
| tree | 7f356aadd71299ccbd75da50858c559809eb9a16 /src/soc/amd | |
| parent | b0db82dd247884e9dba01aa979812cf0943b9a93 (diff) | |
cpu/amd/mtrr: Remove topmem global variables
The comments are not correct anymore. With AGESA there is no need to
synchronize TOM_MEMx msr's between AP's. It's also not the best place
to do so anyway.
Change-Id: Iecbe1553035680b7c3780338070b852606d74d15
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/stoneyridge/chip.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/northbridge.c | 2 |
2 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index 5cc52b6926..666deda7d4 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -131,7 +131,6 @@ static void enable_dev(struct device *dev) static void soc_init(void *chip_info) { fch_init(chip_info); - setup_bsp_ramtop(); } static void soc_final(void *chip_info) diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index d5231ad5d5..5d5ed7a38a 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -332,7 +332,7 @@ static const struct pci_driver family15_northbridge __pci_driver = { */ void amd_initcpuio(void) { - uintptr_t topmem = bsp_topmem(); + uintptr_t topmem = amd_topmem(); uintptr_t base, limit; /* Enable legacy video routing: D18F1xF4 VGA Enable */ |