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| author | Derek Huang <derek.huang@intel.corp-partner.google.com> | 2021-03-15 12:11:19 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-19 11:22:07 +0000 |
| commit | 8056187e4eccd3fc56390498deb692cc16eacc9e (patch) | |
| tree | a5ceb6545f45db3f97587475e6fbae4ae132fcc9 /src/soc/amd | |
| parent | 9e82bf36c82159330f75a5fba6bb4c5ef37940fd (diff) | |
soc/intel/tgl: Add configurable value for PmcUsb2PhySusPgEnable
PmcUsb2PhySusPgEnable is enabled by default. Expose devicetree
parameter to disable
Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com>
Change-Id: Ibd54a10c57d39bb8762b705ef0d6ff4cd47f0d89
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/amd')
0 files changed, 0 insertions, 0 deletions