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authorKarthikeyan Ramasubramanian <kramasub@google.com>2023-10-04 17:50:52 -0600
committerMartin L Roth <gaumless@gmail.com>2023-10-20 19:31:54 +0000
commit637a21e27bf5998662be2c63957141558d296457 (patch)
tree031b3cfaf0ddff8a605c5f669b6414c5c86ccc7d /src/soc/amd
parent244e3ffcbc84ce7f5139771fd6419ebcdab6255c (diff)
soc/amd/phoenix: Disable CCP DMA in PSP Verstage
Some stalls are observed while using CCP DMA in PSP verstage - especially with CBFS verification enabled. Also with RW CBFS verification enabled, the entire firmware body is not loaded during verstage for verification. Instead the files are verified as and when they are loaded from CBFS. Hence the impact to boot time is reduced since only few files are loaded during PSP verstage. Hence disable CCP DMA in PSP verstage until the root cause is identified. BUG=None TEST=Build and boot to OS in Myst with CBFS verification enabled. Change-Id: I22ac108b08abcfe432dfd175644393e384888e11 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78234 Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/phoenix/Kconfig3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig
index ec1a9e93af..c9aa32c770 100644
--- a/src/soc/amd/phoenix/Kconfig
+++ b/src/soc/amd/phoenix/Kconfig
@@ -25,7 +25,8 @@ config SOC_AMD_PHOENIX
select PLATFORM_USES_FSP2_0
select PROVIDES_ROM_SHARING
select PSP_SUPPORTS_EFS2_RELATIVE_ADDR if VBOOT_STARTS_BEFORE_BOOTBLOCK
- select PSP_VERSTAGE_CCP_DMA if VBOOT_STARTS_BEFORE_BOOTBLOCK
+ # TODO: (b/303516266) Re-enable CCP DMA after addressing a stall
+ # select PSP_VERSTAGE_CCP_DMA if VBOOT_STARTS_BEFORE_BOOTBLOCK
select RESET_VECTOR_IN_RAM
select RTC
select SOC_AMD_COMMON