diff options
| author | Kangheui Won <khwon@chromium.org> | 2021-05-06 13:30:51 +1000 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-05-10 04:07:09 +0000 |
| commit | 5858fb4e351ad9064c3970f7f221ec6f75b5dae5 (patch) | |
| tree | 08d9ecf040012be96e726a019de1d572d028333b /src/soc/amd | |
| parent | a5dae4c4d6a7e206fe3f968088d623b2ec776db4 (diff) | |
psp_verstage: differentiate bios entry
AMDFW tool stores bios dir entry to bios1_entry in picasso but
bios3_entry in cezanne. Separate getting bios_dir_addr into a function
and implement it on each platforms.
Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: Ie18ed7979a04319c074b9b251130d419dc7f22dc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52964
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/cezanne/psp_verstage/chipset.c | 5 | ||||
| -rw-r--r-- | src/soc/amd/common/psp_verstage/include/psp_verstage.h | 3 | ||||
| -rw-r--r-- | src/soc/amd/common/psp_verstage/psp_verstage.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/picasso/psp_verstage/chipset.c | 5 |
4 files changed, 14 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/psp_verstage/chipset.c b/src/soc/amd/cezanne/psp_verstage/chipset.c index 7f944ebcbc..c0593bf05a 100644 --- a/src/soc/amd/cezanne/psp_verstage/chipset.c +++ b/src/soc/amd/cezanne/psp_verstage/chipset.c @@ -21,6 +21,11 @@ uint32_t save_uapp_data(void *address, uint32_t size) return svc_save_uapp_data(address, size); } +uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table) +{ + return ef_table->bios3_entry; +} + /* Functions below are stub functions for not-yet-implemented PSP features. * These functions should be replaced with proper implementations later. diff --git a/src/soc/amd/common/psp_verstage/include/psp_verstage.h b/src/soc/amd/common/psp_verstage/include/psp_verstage.h index 65897257ab..7bfc8b77ee 100644 --- a/src/soc/amd/common/psp_verstage/include/psp_verstage.h +++ b/src/soc/amd/common/psp_verstage/include/psp_verstage.h @@ -48,6 +48,8 @@ struct psp_ef_table { uint32_t bios0_entry; uint32_t bios1_entry; uint32_t bios2_entry; + uint32_t reserved1; + uint32_t bios3_entry; } __attribute__((packed, aligned(16))); void test_svc_calls(void); @@ -59,5 +61,6 @@ uintptr_t *map_spi_rom(void); uint32_t get_max_workbuf_size(uint32_t *size); uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset); uint32_t save_uapp_data(void *address, uint32_t size); +uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table); #endif /* PSP_VERSTAGE_H */ diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c index f6cc5e95b8..2265e17e09 100644 --- a/src/soc/amd/common/psp_verstage/psp_verstage.c +++ b/src/soc/amd/common/psp_verstage/psp_verstage.c @@ -107,7 +107,7 @@ static uint32_t update_boot_region(struct vb2_context *ctx) } psp_dir_addr = ef_table->psp_table; - bios_dir_addr = ef_table->bios1_entry; + bios_dir_addr = get_bios_dir_addr(ef_table); psp_dir_in_spi = (uint32_t *)((psp_dir_addr & SPI_ADDR_MASK) + (uint32_t)boot_dev.base); bios_dir_in_spi = (uint32_t *)((bios_dir_addr & SPI_ADDR_MASK) + diff --git a/src/soc/amd/picasso/psp_verstage/chipset.c b/src/soc/amd/picasso/psp_verstage/chipset.c index 57a2ff39a2..b7acbcd282 100644 --- a/src/soc/amd/picasso/psp_verstage/chipset.c +++ b/src/soc/amd/picasso/psp_verstage/chipset.c @@ -18,3 +18,8 @@ uint32_t get_max_workbuf_size(uint32_t *size) { return svc_get_max_workbuf_size(size); } + +uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table) +{ + return ef_table->bios1_entry; +} |