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authorKangheui Won <khwon@chromium.org>2021-05-26 13:40:21 +1000
committerWerner Zeh <werner.zeh@siemens.com>2021-06-07 05:16:06 +0000
commit32f43e0e134eded6221dd59400b2a01860c72f76 (patch)
tree24ba73c27b08a367fe243abdb63089254c363740 /src/soc/amd
parent7ca3ecb73a78ccced90e9f9297030b6aed1c4252 (diff)
psp_verstage: initialize i2c in soc_init
GSC is connected with AP via i2c bus so we need to enable i2c in psp_verstage. Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: I5f7b73be67a692ea7de31ae53bd111d0e4b6998c Reviewed-on: https://review.coreboot.org/c/coreboot/+/55136 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/common/psp_verstage/fch.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/common/psp_verstage/fch.c b/src/soc/amd/common/psp_verstage/fch.c
index a032bde9b2..c74e88fd12 100644
--- a/src/soc/amd/common/psp_verstage/fch.c
+++ b/src/soc/amd/common/psp_verstage/fch.c
@@ -4,6 +4,7 @@
#include <amdblocks/acpimmio.h>
#include <amdblocks/espi.h>
+#include <amdblocks/i2c.h>
#include <amdblocks/spi.h>
#include <arch/exception.h>
#include <arch/hlt.h>
@@ -155,4 +156,9 @@ void verstage_soc_init(void)
{
if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
espi_setup();
+
+ enable_aoac_devices();
+ printk(BIOS_DEBUG, "Setting up i2c\n");
+ i2c_soc_early_init();
+ printk(BIOS_DEBUG, "i2c setup\n");
}