diff options
| author | Chris Wang <chris.wang@amd.corp-partner.google.com> | 2021-02-02 13:04:33 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-02-03 17:27:30 +0000 |
| commit | 4c4a360018315b3bd60d3cfc3506137a631ee7ba (patch) | |
| tree | 76c93db60b686ea263ff0af6a0a87ed9e72f4617 /src/soc/amd | |
| parent | 275440edf1107143865413631efc3f6aace4e7a5 (diff) | |
soc/amd/picasso: clean up and re-sort UPD table
Clean up the unused UPD and re-sort the table, and also update
the new phy parameter in the soc code and overridetree.
remove:
EDpPhySel
EDpVersion
rename:
DpPhyOverride -> edp_phy_override
EDpPhySel -> edp_physel
DpVsPemphLevel -> edp_dp_vs_pemph_level
MarginDeemPh -> edp_margin_deemph
Deemph6db4 -> edp_deemph_6db_4
BoostAdj -> edp_boost_adj
eDP phy setting:
DP_VS_LEVEL0_PREEMPH_LEVEL0 = 0x00(0.4v 0db swing 0,pre-emphasis 0)
COMMON_MAR_DEEMPH_NOM = 0x004b
COMMON_SELDEEMPH60 = 0x0
CMD_BUS_GLOBAL_FOR_TX_LANE0 = 0x80
BUG=b:171269338
BRANCH=zork
TEST=Build, verify the parameter pass to picasso-fsp
Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com>
Change-Id: I655af08e2f86398d088e30d330f49e71cf7e1275
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50212
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/picasso/chip.h | 4 | ||||
| -rw-r--r-- | src/soc/amd/picasso/fsp_params.c | 13 |
2 files changed, 10 insertions, 7 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 244d7831ec..9a7d2a5bfc 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -253,7 +253,9 @@ struct soc_amd_picasso_config { bool acp_i2s_use_external_48mhz_osc; /* eDP phy tuning settings */ - uint8_t dp_phy_override; + uint16_t edp_phy_override; + /* bit vector of phy, bit0=1: DP0, bit1=1: DP1, bit2=1: DP2 bit3=1: DP3 */ + uint8_t edp_physel; struct { uint8_t dp_vs_pemph_level; diff --git a/src/soc/amd/picasso/fsp_params.c b/src/soc/amd/picasso/fsp_params.c index 731a564416..df5e1e61b4 100644 --- a/src/soc/amd/picasso/fsp_params.c +++ b/src/soc/amd/picasso/fsp_params.c @@ -145,12 +145,13 @@ static void fsp_assign_ioapic_upds(FSP_S_CONFIG *scfg) static void fsp_edp_tuning_upds(FSP_S_CONFIG *scfg, const struct soc_amd_picasso_config *cfg) { - if (cfg->dp_phy_override & ENABLE_EDP_TUNINGSET) { - scfg->DpPhyOverride = cfg->dp_phy_override; - scfg->DpVsPemphLevel = cfg->edp_tuningset.dp_vs_pemph_level; - scfg->MarginDeemPh = cfg->edp_tuningset.margin_deemph; - scfg->Deemph6db4 = cfg->edp_tuningset.deemph_6db4; - scfg->BoostAdj = cfg->edp_tuningset.boostadj; + if (cfg->edp_phy_override & ENABLE_EDP_TUNINGSET) { + scfg->edp_phy_override = cfg->edp_phy_override; + scfg->edp_physel = cfg->edp_physel; + scfg->edp_dp_vs_pemph_level = cfg->edp_tuningset.dp_vs_pemph_level; + scfg->edp_margin_deemph = cfg->edp_tuningset.margin_deemph; + scfg->edp_deemph_6db_4 = cfg->edp_tuningset.deemph_6db4; + scfg->edp_boost_adj = cfg->edp_tuningset.boostadj; } if (cfg->edp_pwr_adjust_enable) { scfg->pwron_digon_to_de = cfg->pwron_digon_to_de; |