diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-26 11:28:47 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-02-06 07:17:05 +0000 |
| commit | 021c621eb0c8b21a34902519da595df94a973414 (patch) | |
| tree | 8cf6e285c70308f775705002ca71229008e7d345 /src/soc/amd | |
| parent | 8fee9951d30d03b4bca16c198b887c5415418c12 (diff) | |
soc/amd/stoneyridge: Create chipset_power_state in romstage
Move chipset_power_state initialisation from early ramstage
to romstage cbmem hook, like everyone else does.
Change-Id: Ib9189a70996ac6cf4515a0d504eb687941a6b5e0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50295
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/stoneyridge/romstage.c | 13 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 10 |
2 files changed, 13 insertions, 10 deletions
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 3db7c42e7f..e316d2166a 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <amdblocks/acpi.h> #include <amdblocks/biosram.h> #include <device/pci_ops.h> #include <arch/cpu.h> @@ -204,3 +205,15 @@ void soc_customize_init_early(AMD_EARLY_PARAMS *InitEarly) platform->PlatStapmConfig.CfgStapmBoost = StapmBoostEnabled; } } + +static void migrate_power_state(int is_recovery) +{ + struct chipset_power_state *state; + state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state)); + if (state) { + acpi_fill_pm_gpe_state(&state->gpe_state); + acpi_pm_gpe_add_events_print_events(); + } + acpi_clear_pm_gpe_status(); +} +ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state) diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 2a78ff9650..c53bcf05a5 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -404,17 +404,7 @@ static void fch_init_acpi_ports(void) void fch_init(void *chip_info) { - struct chipset_power_state *state; - fch_init_acpi_ports(); - - state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state)); - if (state) { - acpi_fill_pm_gpe_state(&state->gpe_state); - acpi_pm_gpe_add_events_print_events(); - } - - acpi_clear_pm_gpe_status(); } static void set_sb_aoac(struct aoac_devs *aoac) |