diff options
| author | Felix Held <felix.held@amd.corp-partner.google.com> | 2021-08-30 18:20:34 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-08-15 15:33:52 +0000 |
| commit | 8db77d71bbbb872831a6bb61dac249d551773a84 (patch) | |
| tree | 88fc6554faca16253bc7d9869ca1694d5b824cb2 /src/soc/amd/stoneyridge | |
| parent | b02cc14367890661ca047ffe8c5d86a3e6bac95d (diff) | |
soc/amd/*: move reset_i2c_peripherals call after early GPIO setup
Since bootblock_soc_early_init gets called before
bootblock_mainboard_early_init which does the early GPIO setup, external
I2C level shifters that are controlled by GPIOs might not be enabled yet.
Moving the reset_i2c_peripherals call to bootblock_soc_init makes sure
that the early GPIO setup is already done when reset_i2c_peripherals is
called.
Haven't probed any SCL signal on the non-SoC side of the I2C level
shifters yet, but the waveform on the SCL pin of I2C3 on the SoC of a
barla/careena Chromebook doesn't have the longer than expected SCL
pulses any more.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If02140aef56ed6db7ecee24811724b5b24e54a91
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57291
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge')
| -rw-r--r-- | src/soc/amd/stoneyridge/bootblock.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/soc/amd/stoneyridge/bootblock.c b/src/soc/amd/stoneyridge/bootblock.c index 8c6fde521a..66b22be99e 100644 --- a/src/soc/amd/stoneyridge/bootblock.c +++ b/src/soc/amd/stoneyridge/bootblock.c @@ -96,6 +96,12 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp) void bootblock_soc_early_init(void) { + bootblock_fch_early_init(); + post_code(0x90); +} + +void bootblock_soc_init(void) +{ /* * This call (sb_reset_i2c_peripherals) was originally early at * bootblock_c_entry, but had to be moved here. There was an @@ -105,12 +111,7 @@ void bootblock_soc_early_init(void) * just pauses but we don't know why. */ reset_i2c_peripherals(); - bootblock_fch_early_init(); - post_code(0x90); -} -void bootblock_soc_init(void) -{ if (CONFIG(AMD_SOC_CONSOLE_UART)) assert(CONFIG_UART_FOR_CONSOLE >= 0 && CONFIG_UART_FOR_CONSOLE <= 1); |