diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-11-09 14:00:44 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-18 16:00:45 +0000 |
| commit | 799c3219146c8d246ef95f1fdb83dc7bc1f2be61 (patch) | |
| tree | e6dcc99fe3b577d28b602311232779eff8dda4cb /src/soc/amd/stoneyridge | |
| parent | 9cbbba68b650933cf552f9e1b969f08e463c641f (diff) | |
cbmem_top_chipset: Change the return value to uintptr_t
Get rid of a lot of casts.
Change-Id: I93645ef5dd270905ce421e68e342aff4c331eae6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
| -rw-r--r-- | src/soc/amd/stoneyridge/memmap.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/memmap.c b/src/soc/amd/stoneyridge/memmap.c index f01574097a..7a225e1b1f 100644 --- a/src/soc/amd/stoneyridge/memmap.c +++ b/src/soc/amd/stoneyridge/memmap.c @@ -12,7 +12,7 @@ #include <soc/iomap.h> #include <amdblocks/biosram.h> -void *cbmem_top_chipset(void) +uintptr_t cbmem_top_chipset(void) { msr_t tom = rdmsr(TOP_MEM); @@ -20,8 +20,7 @@ void *cbmem_top_chipset(void) return 0; /* 8MB alignment to keep MTRR usage low */ - return (void *)ALIGN_DOWN(restore_top_of_low_cacheable() - - CONFIG_SMM_TSEG_SIZE, 8 * MiB); + return ALIGN_DOWN(restore_top_of_low_cacheable() - CONFIG_SMM_TSEG_SIZE, 8 * MiB); } static uintptr_t smm_region_start(void) |