diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-10-22 14:39:37 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-07 16:45:35 +0000 |
| commit | 2b7cd1d0d4fcf797866681c2edc807fe1e2bbd03 (patch) | |
| tree | 59b572d6c5183f3ffd63fb7095cb3f098449df84 /src/soc/amd/stoneyridge | |
| parent | c92ecaa4d65f80bfc0e91dbbdc74f47bb167a844 (diff) | |
soc/amd/stoneyridge: Fix 81+ characters lines
There some files that do have at least 1 line over the 80 characters limit.
Find and fix them.
BUG=b:117950052
TEST=Build grunt.
Change-Id: I1083a7559919e05a3e3a2dac99f571c161bb4c27
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/29228
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/nvs.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/northbridge.c | 28 |
2 files changed, 15 insertions, 15 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h index 3e6ef3042b..08d46973c0 100644 --- a/src/soc/amd/stoneyridge/include/soc/nvs.h +++ b/src/soc/amd/stoneyridge/include/soc/nvs.h @@ -43,7 +43,7 @@ typedef struct global_nvs_t { uint32_t nhll; /* 0x21 - 0x24 - NHLT Length */ uint32_t prt0; /* 0x25 - 0x28 - PERST_0 Address */ uint8_t scdp; /* 0x29 - SD_CD GPIO portid */ - uint8_t scdo; /* 0x2A - GPIO pad offset relative to the community */ + uint8_t scdo; /* 0x2A - GPIO pad relative offset */ uint8_t tmps; /* 0x2B - Temperature Sensor ID */ uint8_t tlvl; /* 0x2C - Throttle Level Limit */ uint8_t flvl; /* 0x2D - Current FAN Level */ diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index d7a20a3288..b57113bed8 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -86,48 +86,48 @@ static void read_resources(struct device *dev) res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -static void set_resource(struct device *dev, struct resource *resource, u32 nodeid) +static void set_resource(struct device *dev, struct resource *res, u32 nodeid) { resource_t rbase, rend; unsigned int reg, link_num; char buf[50]; /* Make certain the resource has actually been set */ - if (!(resource->flags & IORESOURCE_ASSIGNED)) + if (!(res->flags & IORESOURCE_ASSIGNED)) return; /* If I have already stored this resource don't worry about it */ - if (resource->flags & IORESOURCE_STORED) + if (res->flags & IORESOURCE_STORED) return; /* Only handle PCI memory and IO resources */ - if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) + if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) return; /* Ensure I am actually looking at a resource of function 1 */ - if ((resource->index & 0xffff) < 0x1000) + if ((res->index & 0xffff) < 0x1000) return; /* Get the base address */ - rbase = resource->base; + rbase = res->base; /* Get the limit (rounded up) */ - rend = resource_end(resource); + rend = resource_end(res); /* Get the register and link */ - reg = resource->index & 0xfff; /* 4k */ - link_num = IOINDEX_LINK(resource->index); + reg = res->index & 0xfff; /* 4k */ + link_num = IOINDEX_LINK(res->index); - if (resource->flags & IORESOURCE_IO) + if (res->flags & IORESOURCE_IO) set_io_addr_reg(dev, nodeid, link_num, reg, rbase>>8, rend>>8); - else if (resource->flags & IORESOURCE_MEM) + else if (res->flags & IORESOURCE_MEM) set_mmio_addr_reg(nodeid, link_num, reg, - (resource->index >> 24), rbase >> 8, rend >> 8); + (res->index >> 24), rbase >> 8, rend >> 8); - resource->flags |= IORESOURCE_STORED; + res->flags |= IORESOURCE_STORED; snprintf(buf, sizeof(buf), " <node %x link %x>", nodeid, link_num); - report_resource_stored(dev, resource, buf); + report_resource_stored(dev, res, buf); } /** |