soc/amd/common/psp: Split mailbox support into v1 and v2

Family 17h redefines the PSP command and status, and therefore the
steps required to send commands via the mailbox.  Convert the existing
version into a v1 and add a v2.  New Kconfig options allow the soc to
choose v1 vs. v2.

The v2 PSP begins responding to the mailbox command when the full
bit range is written.  Define the new mailbox as a union of a u32
and a structure.

Additional PSP details may be found in the NDA publication (#55758)
  AMD Platform Security Processor BIOS Architecture Design Guide for
  AMD Family 17h Processors

Change the existing two soc functions that return pointers to void
pointers.

BUG=b:153677737

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4d358fdae07da471640856f57568059e9487f6a8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40293
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

2 files changed, 3 insertions, 3 deletions

diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 14615888e3..d73f3153e8 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -47,7 +47,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_AMD_COMMON_BLOCK_HDA
 	select SOC_AMD_COMMON_BLOCK_SATA
 	select SOC_AMD_COMMON_BLOCK_PI
-	select SOC_AMD_COMMON_BLOCK_PSP
+	select SOC_AMD_COMMON_BLOCK_PSP_GEN1
 	select SOC_AMD_COMMON_BLOCK_CAR
 	select SOC_AMD_COMMON_BLOCK_S3
 	select SOC_AMD_COMMON_BLOCK_SMBUS
diff --git a/src/soc/amd/stoneyridge/psp.c b/src/soc/amd/stoneyridge/psp.c
index bc2d725145..88bd61d4dd 100644
--- a/src/soc/amd/stoneyridge/psp.c
+++ b/src/soc/amd/stoneyridge/psp.c
@@ -30,7 +30,7 @@ void soc_enable_psp_early(void)
 	pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, cmd);
 };
 
-struct psp_mbox *soc_get_mbox_address(void)
+void *soc_get_mbox_address(void)
 {
 	uintptr_t psp_mmio;
 
@@ -54,5 +54,5 @@ struct psp_mbox *soc_get_mbox_address(void)
 				~PCI_BASE_ADDRESS_MEM_ATTR_MASK;
 	}
 
-	return (struct psp_mbox *)(psp_mmio + PSP_MAILBOX_OFFSET);
+	return (void *)(psp_mmio + PSP_MAILBOX_OFFSET);
 }