soc/amd/stoneyridge/southbridge: make sb_disable_4dw_burst static

sb_disable_4dw_burst is only used in the same compilation unit, so no
need to make it externally visible.

Change-Id: I6c7c96f67b98fb8ed808f45a7685c4d72a10d32c
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48431
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>

2 files changed, 1 insertions, 2 deletions

diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index d346197fb0..e0ffd6102b 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -248,7 +248,6 @@ typedef struct aoac_devs {
 
 void enable_aoac_devices(void);
 void sb_clk_output_48Mhz(u32 osc);
-void sb_disable_4dw_burst(void);
 void sb_enable(struct device *dev);
 void southbridge_final(void *chip_info);
 void southbridge_init(void *chip_info);
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 7661607b95..881570241a 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -255,7 +255,7 @@ void sb_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm)
 	spi_write16(SPI100_ENABLE, SPI_USE_SPI100);
 }
 
-void sb_disable_4dw_burst(void)
+static void sb_disable_4dw_burst(void)
 {
 	spi_write16(SPI100_HOST_PREF_CONFIG,
 			spi_read16(SPI100_HOST_PREF_CONFIG) & ~SPI_RD4DW_EN_HOST);