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authorJamie Chen <jamie.chen@intel.com>2020-03-10 16:50:53 +0800
committerEdward O'Callaghan <quasisec@chromium.org>2020-07-20 12:36:59 +0000
commit3658c629086754fd4ad66d64f7d9862acfe31ef5 (patch)
treeaf00b6c8f20684c433050218a75f3c4fe3056a49 /src/soc/amd/stoneyridge
parent73e35f6af94f31f84b2b43fc04d8be06b957b0a9 (diff)
soc/intel/cannonlake: Add configs for USB 3.1 Gen2 EV settings
Add configs for USB 3.1 Gen2 EV settings so that people can set the EV settings per board in device tree. BUG=b:150515720 BRANCH=none TEST=build coreboot and fsp with enabled fw_debug. Flashed to puff and checked the log. All usb configs were set correctly. Signed-off-by: Jamie Chen <jamie.chen@intel.com> Change-Id: Id4860665619095139c329565d433d9eb495cac02 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39448 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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