diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-09 01:07:00 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-10 01:31:39 +0000 |
| commit | 063fc1747aec2fb9f32756a800a89c5b9beeb0f8 (patch) | |
| tree | d31f5956253ed21a1133069cc6996e6edd023da7 /src/soc/amd/stoneyridge | |
| parent | 1a973434c57fb11478c37ac9fb0b72b4ff0c919c (diff) | |
soc/amd: Move global_smi_enable to common/blocks/smi/smi_util
Change-Id: I4410772a8d3f2dedbb96601d87efb23b14e5f438
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42989
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge')
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/smi.c | 20 |
2 files changed, 0 insertions, 21 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 47ecbe7fc5..f711c3a5d9 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -58,7 +58,6 @@ ramstage-y += southbridge.c ramstage-y += northbridge.c ramstage-y += sata.c ramstage-y += memmap.c -ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-y += uart.c ramstage-y += usb.c ramstage-y += tsc_freq.c diff --git a/src/soc/amd/stoneyridge/smi.c b/src/soc/amd/stoneyridge/smi.c deleted file mode 100644 index fb6d3484ad..0000000000 --- a/src/soc/amd/stoneyridge/smi.c +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -/* - * Utilities for SMM setup - */ - -#include <console/console.h> -#include <cpu/x86/smm.h> -#include <amdblocks/acpimmio.h> -#include <soc/southbridge.h> -#include <soc/smi.h> - -/** Set the EOS bit and enable SMI generation from southbridge */ -void global_smi_enable(void) -{ - uint32_t reg = smi_read32(SMI_REG_SMITRIG0); - reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */ - reg |= SMITRG0_EOS; /* Set EOS bit */ - smi_write32(SMI_REG_SMITRIG0, reg); -} |