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authorElyes Haouas <ehaouas@noos.fr>2024-06-01 18:12:16 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-07-10 12:55:46 +0000
commite7fa24470dc3b3403eabd757a87cfb993f316b1a (patch)
tree6497bd70076905089fc81ed777cbec34486569c0 /src/soc/amd/stoneyridge
parenta9997f891facaf3c855d7f2c9c6840acbf101193 (diff)
cbmem_top: Change the return value to uintptr_t
Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82752 Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Jakub Czapiga <czapiga@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r--src/soc/amd/stoneyridge/memmap.c2
-rw-r--r--src/soc/amd/stoneyridge/northbridge.c2
-rw-r--r--src/soc/amd/stoneyridge/romstage.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/memmap.c b/src/soc/amd/stoneyridge/memmap.c
index 32d6d96a5b..f99c884ccf 100644
--- a/src/soc/amd/stoneyridge/memmap.c
+++ b/src/soc/amd/stoneyridge/memmap.c
@@ -22,7 +22,7 @@ uintptr_t cbmem_top_chipset(void)
static uintptr_t smm_region_start(void)
{
- return (uintptr_t)cbmem_top();
+ return cbmem_top();
}
static size_t smm_region_size(void)
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index b51601ba02..9519713447 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -259,7 +259,7 @@ void domain_read_resources(struct device *dev)
{
uint64_t uma_base = get_uma_base();
uint32_t uma_size = get_uma_size();
- uint32_t mem_useable = (uintptr_t)cbmem_top();
+ uint32_t mem_useable = cbmem_top();
uint32_t tom = get_top_of_mem_below_4gb();
uint64_t high_tom = get_top_of_mem_above_4gb();
uint64_t high_mem_useable;
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index fc918f916f..900d1a668a 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -125,7 +125,7 @@ void __noreturn romstage_main(void)
void fill_postcar_frame(struct postcar_frame *pcf)
{
- uintptr_t top_of_ram = (uintptr_t)cbmem_top();
+ const uintptr_t top_of_ram = cbmem_top();
postcar_frame_add_mtrr(pcf, top_of_ram - 16 * MiB, 16 * MiB, MTRR_TYPE_WRBACK);
/* Cache the TSEG region */