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authorMarshall Dawson <marshalldawson3rd@gmail.com>2019-05-21 18:45:07 -0600
committerMarshall Dawson <marshalldawson3rd@gmail.com>2019-06-11 14:39:05 +0000
commit2395917adfd267a737beb38285a8e689b27235aa (patch)
treec6c3e26bef682b51f9e336bead30903d0a45b873 /src/soc/amd/stoneyridge
parent1cf5ea5f1db6f780cd6da052c615a920c7201462 (diff)
soc/amd/common: Add errors for invalid AcpiMmio access
Add a method for the soc/amd/<product> to indicate what AcpiMmio ranges are supported. Induce a build error if soc or mainboard code is added which attempts to use an unsupported block. This patch attempts to dissuade accessing unsupported blocks without requiring the complexity of structures or reinitializing at the beginning of a new stage. TEST=boot grunt, force build errors by removing blocks in iomap.h BUG=b:131682806 Change-Id: I2121df108fd3caf07e5588bc3201bcdd8dcaaa00 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32934 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/iomap.h19
1 files changed, 18 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h
index 3856a22796..612b6e871b 100644
--- a/src/soc/amd/stoneyridge/include/soc/iomap.h
+++ b/src/soc/amd/stoneyridge/include/soc/iomap.h
@@ -22,8 +22,25 @@
#define SPI_BASE_ADDRESS 0xfec10000
#define IO_APIC2_ADDR 0xfec20000
-/* AcpiMmio blocks are at fixed offsets from FED8_0000h, enabled in PMx04[1] */
+/*
+ * AcpiMmio blocks are at fixed offsets from FED8_0000h and enabled in PMx04[1].
+ * All ranges not specified as supported below may, or may not, be listed in
+ * any documentation but should be considered reserved through FED8_1FFFh.
+ */
#include <amdblocks/acpimmio_map.h>
+#define SUPPORTS_ACPIMMIO_SMI_BASE 1 /* 0xfed80100 */
+#define SUPPORTS_ACPIMMIO_PMIO_BASE 1 /* 0xfed80300 */
+#define SUPPORTS_ACPIMMIO_BIOSRAM_BASE 1 /* 0xfed80500 */
+#define SUPPORTS_ACPIMMIO_ACPI_BASE 1 /* 0xfed80800 */
+#define SUPPORTS_ACPIMMIO_ASF_BASE 1 /* 0xfed80900 */
+#define SUPPORTS_ACPIMMIO_SMBUS_BASE 1 /* 0xfed80a00 */
+#define SUPPORTS_ACPIMMIO_IOMUX_BASE 1 /* 0xfed80d00 */
+#define SUPPORTS_ACPIMMIO_MISC_BASE 1 /* 0xfed80e00 */
+#define SUPPORTS_ACPIMMIO_GPIO0_BASE 1 /* 0xfed81500 */
+#define SUPPORTS_ACPIMMIO_GPIO1_BASE 1 /* 0xfed81800 */
+#define SUPPORTS_ACPIMMIO_GPIO2_BASE 1 /* 0xfed81700 */
+#define SUPPORTS_ACPIMMIO_XHCIPM_BASE 1 /* 0xfed81c00 */
+#define SUPPORTS_ACPIMMIO_AOAC_BASE 1 /* 0xfed81e00 */
#define ALINK_AHB_ADDRESS 0xfedc0000