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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-03 23:18:01 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-08 04:51:32 +0000
commit9970b61ad3049d87650cd7b4eb5f47d667098186 (patch)
tree912ee2624ebd4d9c68ab62cbde170c1e5d114b0f /src/soc/amd/stoneyridge
parent0a4457ff44b10f22b711f64e88888c757fbedf32 (diff)
arch/x86: Move TSEG_STAGE_CACHE implementation
This is declared weak so that platforms that do not have smm_subregion() can provide their own implementation. Change-Id: Ide815b45cbc21a295b8e58434644e82920e84e31 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34704 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r--src/soc/amd/stoneyridge/ramtop.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c
index 4ff4252c76..f0051e4bfe 100644
--- a/src/soc/amd/stoneyridge/ramtop.c
+++ b/src/soc/amd/stoneyridge/ramtop.c
@@ -23,7 +23,6 @@
#include <cpu/amd/msr.h>
#include <cpu/amd/mtrr.h>
#include <cbmem.h>
-#include <stage_cache.h>
#include <arch/bert_storage.h>
#include <soc/northbridge.h>
#include <soc/iomap.h>
@@ -82,15 +81,6 @@ static size_t smm_region_size(void)
return CONFIG_SMM_TSEG_SIZE;
}
-void stage_cache_external_region(void **base, size_t *size)
-{
- if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) {
- printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n");
- *base = NULL;
- *size = 0;
- }
-}
-
void smm_region(void **start, size_t *size)
{
*start = (void *)smm_region_start();