diff options
| author | Pratik Prajapati <pratikkumar.v.prajapati@intel.com> | 2017-08-29 14:11:16 -0700 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2017-09-27 06:46:18 +0000 |
| commit | 4bc6edf90956a9971aedb187e570d5c0f58d70cd (patch) | |
| tree | b31c6ef793914d1d42f69a8ddcd7cd9d33c42496 /src/soc/amd/stoneyridge/uart.c | |
| parent | fcf88205050aed4f26b1afc74f3fa5c39a0de2d8 (diff) | |
soc/intel/apollolake: Add PrmrrSize and SGX enable config
Add PrmrrSize and sgx_enable config option. PrmrrSize gets
configured in romstage so that FSP can allocate memory for SGX.
Also, adjust cbmem_top() calculation.
Change-Id: I56165ca201163a8b8b522e9aeb47bd1f4267be5e
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/21274
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/uart.c')
0 files changed, 0 insertions, 0 deletions