soc/amd/stoneyridge: Add aoac_ read/write functions

Add 8-bit functions to access the AOAC registers and use them in
southbridge.c.  At this time, there is no reason to pursue WORD or
DWORD access and it's not known if those transaction sizes are
supported.

Change-Id: I3a8f493625f941fb855c0b8a0eff511a9a5ddfe8
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32645
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 4 insertions, 6 deletions

diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 66894a24b4..7dc27c86da 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -279,20 +279,18 @@ int sb_set_wideio_range(uint16_t start, uint16_t size)
 static void power_on_aoac_device(int aoac_device_control_register)
 {
 	uint8_t byte;
-	uint8_t *register_pointer = (uint8_t *)(uintptr_t)ACPIMMIO_AOAC_BASE
-			+ aoac_device_control_register;
 
 	/* Power on the UART and AMBA devices */
-	byte = read8(register_pointer);
+	byte = aoac_read8(aoac_device_control_register);
 	byte |= FCH_AOAC_PWR_ON_DEV;
-	write8(register_pointer, byte);
+	aoac_write8(aoac_device_control_register, byte);
 }
 
 static bool is_aoac_device_enabled(int aoac_device_status_register)
 {
 	uint8_t byte;
-	byte = read8((uint8_t *)(uintptr_t)ACPIMMIO_AOAC_BASE
-			+ aoac_device_status_register);
+
+	byte = aoac_read8(aoac_device_status_register);
 	byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE);
 	if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE))
 		return true;