diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-11-28 17:51:29 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-19 19:49:19 +0000 |
| commit | a89d19a9800a968c0fe4f3eb4218b9babeefb457 (patch) | |
| tree | c1cb8916dbe1249a985dfd7bafa242a894abed78 /src/soc/amd/stoneyridge/southbridge.c | |
| parent | d77c764dd1181204b6682b657e561d0a929cf4c7 (diff) | |
amd/stoneyridge: Add BIOS RAM R/W functions
The internal FCH contains 256 bytes of "BiosRam" that maintains its
state until RSMRST# is asserted or standby power is lost. Add functions
to support read and write operations.
Change-Id: I2ddf58a63e69b2775de9a8163534b13dad2ea2fe
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22724
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/southbridge.c')
0 files changed, 0 insertions, 0 deletions