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| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-10-25 17:55:01 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-03 13:21:21 +0000 |
| commit | 2c5ea145a4547c5c27de4bcc065a6345ea285fe6 (patch) | |
| tree | d9ebcebaec5ccf546cf901d0c33ad56cb0de6ce2 /src/soc/amd/stoneyridge/southbridge.c | |
| parent | 142940de79f0073fbaa74dfae6068a1099c1c34f (diff) | |
soc/amd/stoneyridge: Create MMIO offsets for ACPI
ACPI registers can be accessed through IO or through MMIO. However, the
offset relationship is not one to one. Therefore, definitions with the
correct offset for MMIO access are needed.
BUG=b:118049037
TEST=Use Chrome OS IOTOOLS io_readxx and mem_readxx to find the correct
relationship between ACPI IO and ACPI MMIO.
Change-Id: Id20754c0fc0af35bc9eb1a4b40c62fbf9ed6304d
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/29294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/southbridge.c')
0 files changed, 0 insertions, 0 deletions