diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2020-11-30 17:56:59 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-02 21:26:50 +0000 |
| commit | 5b3831c75abe5fc50739984eaa70fbada2575bb7 (patch) | |
| tree | 2161a533d7ed50dd612429812f1d6a747cd9c9cd /src/soc/amd/stoneyridge/southbridge.c | |
| parent | f7b410d4098009e65567f9ad5b7762923830f444 (diff) | |
soc/amd: factor out common AOAC definitions
The register locations and bit definitions are the same for Stoneyridge
and Picasso. Since not all devices are present on all SoCs, keep those
numbers in the SoC-specific code.
Change-Id: Ib882927e399031c376738e5a35793b3d7654b9cf
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/southbridge.c')
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 05f3072edd..b427c18635 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -12,6 +12,7 @@ #include <acpi/acpi_gnvs.h> #include <amdblocks/amd_pci_util.h> #include <amdblocks/agesawrapper.h> +#include <amdblocks/aoac.h> #include <amdblocks/reset.h> #include <amdblocks/acpimmio.h> #include <amdblocks/lpc.h> |