diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-10-26 13:25:01 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-03 13:21:35 +0000 |
| commit | e24d7953bb4a862b32f554195fffb3c119a27161 (patch) | |
| tree | 621d5fc455ce9bd4388488ba68d38beac3d8b839 /src/soc/amd/stoneyridge/smihandler.c | |
| parent | 2c5ea145a4547c5c27de4bcc065a6345ea285fe6 (diff) | |
soc/amd/stoneyridge: Use new ACPI MMIO functions
Replace IO access to ACPI registers with the new MMIO access functions.
BUG=b:118049037
TEST=Build and boot grunt. Test ACPI related functionality.
Change-Id: I7544169bb21982fcf7b1c07ab7c19c6f5e65ad56
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/29296
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/smihandler.c')
| -rw-r--r-- | src/soc/amd/stoneyridge/smihandler.c | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c index 8985257139..a5e66a88d2 100644 --- a/src/soc/amd/stoneyridge/smihandler.c +++ b/src/soc/amd/stoneyridge/smihandler.c @@ -92,14 +92,14 @@ static void sb_apmc_smi_handler(void) switch (cmd) { case APM_CNT_ACPI_ENABLE: - reg32 = inl(ACPI_PM1_CNT_BLK); + reg32 = acpi_read32(MMIO_ACPI_PM1_CNT_BLK); reg32 |= (1 << 0); /* SCI_EN */ - outl(reg32, ACPI_PM1_CNT_BLK); + acpi_write32(MMIO_ACPI_PM1_CNT_BLK, reg32); break; case APM_CNT_ACPI_DISABLE: - reg32 = inl(ACPI_PM1_CNT_BLK); + reg32 = acpi_read32(MMIO_ACPI_PM1_CNT_BLK); reg32 &= ~(1 << 0); /* clear SCI_EN */ - outl(reg32, ACPI_PM1_CNT_BLK); + acpi_write32(MMIO_ACPI_PM1_CNT_BLK, reg32); break; case ELOG_GSMI_APM_CNT: if (IS_ENABLED(CONFIG_ELOG_GSMI)) @@ -127,7 +127,7 @@ static void sb_slp_typ_handler(void) uint8_t slp_typ, rst_ctrl; /* Figure out SLP_TYP */ - pm1cnt = inw(pm_acpi_pm_cnt_blk()); + pm1cnt = acpi_read16(MMIO_ACPI_PM1_CNT_BLK); printk(BIOS_SPEW, "SMI#: SLP = 0x%04x\n", pm1cnt); slp_typ = acpi_sleep_from_pm1(pm1cnt); @@ -182,20 +182,25 @@ static void sb_slp_typ_handler(void) * becomes a SCI. */ if (IS_ENABLED(CONFIG_ELOG_GSMI)) { - reg16 = inw(ACPI_PM1_EN) & inw(ACPI_PM1_STS); + reg16 = acpi_read16(MMIO_ACPI_PM1_EN); + reg16 &= acpi_read16(MMIO_ACPI_PM1_STS); if (reg16) elog_add_extended_event( ELOG_SLEEP_PENDING_PM1_WAKE, (u32)reg16); - reg32 = inl(ACPI_GPE0_EN) & inl(ACPI_GPE0_STS); + reg32 = acpi_read32(MMIO_ACPI_GPE0_EN); + reg32 &= acpi_read32(MMIO_ACPI_GPE0_STS); if (reg32) elog_add_extended_event( ELOG_SLEEP_PENDING_GPE0_WAKE, reg32); } /* if (IS_ENABLED(CONFIG_ELOG_GSMI)) */ - /* Reissue Pm1 write */ + /* + * An IO cycle is required to trigger the STPCLK/STPGNT + * handshake when the Pm1 write is reissued. + */ outw(pm1cnt | SLP_EN, pm_acpi_pm_cnt_blk()); hlt(); } |