diff options
| author | Marc Jones <marcj303@gmail.com> | 2017-10-04 22:12:31 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-10-20 21:32:29 +0000 |
| commit | e8e72bd0ca3ea84ba21db4318589e5c903085419 (patch) | |
| tree | ad4e32463628d3c1776e3b3cdf5de20b9fae6ed1 /src/soc/amd/stoneyridge/sb_util.c | |
| parent | f1c8ea35b338981b4cd02c38aed1dfabc3cdf251 (diff) | |
stoneyridge: Add SCI/GPE configuration
Add functions for configuring the GPE ACPI SCI events.
BUG=b:63268311
BRANCH=none
TEST=With the Kahlee GPE setup patch, test lidswitch powers
the device on and off at the login screen.
Change-Id: I5c282268edbd7b92a3f2ca7c72896406c8f8512f
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22095
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/sb_util.c')
| -rw-r--r-- | src/soc/amd/stoneyridge/sb_util.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/sb_util.c b/src/soc/amd/stoneyridge/sb_util.c index bdb199aa1e..ebf791d6ff 100644 --- a/src/soc/amd/stoneyridge/sb_util.c +++ b/src/soc/amd/stoneyridge/sb_util.c @@ -65,6 +65,16 @@ void smi_write16(uint8_t offset, uint16_t value) write16((void *)(APU_SMI_BASE + offset), value); } +uint8_t smi_read8(uint8_t offset) +{ + return read8((void *)(APU_SMI_BASE + offset)); +} + +void smi_write8(uint8_t offset, uint8_t value) +{ + write8((void *)(APU_SMI_BASE + offset), value); +} + uint16_t pm_acpi_pm_cnt_blk(void) { return pm_read16(PM1_CNT_BLK); |