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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-07-13 18:31:40 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-14 17:35:17 +0000 |
| commit | 71b918d882738fd99f7894d43a96d5782ad1928b (patch) | |
| tree | cb5b0c3ab1961b4c041b0cd68a2a657d74b9f81c /src/soc/amd/stoneyridge/sata.c | |
| parent | 4f51c94099b5a8308c0342830e1bf52f1ac095e9 (diff) | |
include/cpu/amd/msr: add and use MC_CTL_MASK macro
Add this macro to be able to conveniently access the MC_CTL_MASK
register for each MCA bank. Also drop the unused definitions for
MC1_CTL_MASK and MC4_CTL_MASK.
Change-Id: I23ce1eac2ffce35a2b45387ee86aa77b52da5494
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56261
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/sata.c')
0 files changed, 0 insertions, 0 deletions