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authorAngel Pons <th3fanbus@gmail.com>2020-09-15 13:19:07 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-02-18 10:14:56 +0000
commitff254ea60bd489c87f566f1f71585d546a8e844a (patch)
treedf0f8278e3d68b172c2038491345a2499ca96e61 /src/soc/amd/stoneyridge/sata.c
parent7a940dfb22461da543cc6f68c5db237c930cebf7 (diff)
nb/intel/pineview: Drop unused `GPIO32` macro
It's not used, and GPIO registers are on the southbridge. Change-Id: I0b7b6edc22d461007f24618eca42091439a53d3c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45423 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/sata.c')
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