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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-12 23:35:11 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-15 19:18:26 +0000
commitc2cee06b4efb8992e625ca4554df17c7ef457930 (patch)
treec492e9020bb353dc51e94b5dc1d1f062a6ca66d9 /src/soc/amd/stoneyridge/sata.c
parent6c08b1ff8180181ff50150a17ae94abde9ffc2f2 (diff)
soc/amd/common/block/i2c: implement proper read_resource
Before this patch the reservation of the MMIO region of the I2C controllers was done in the LPC controller PCI device despite the I2C controllers already being devices in the devicetree. This patch implements this functionality as read_resources function of the I2C device instead. This will only reserve the memory when the I2C devices are enabled in devicetree which is a change from the previous behavior. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I67c853df3be2f593ecfa113ae2f74e5df7cf74e0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58307 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/sata.c')
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