diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-11-26 22:47:43 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-29 20:27:44 +0000 |
| commit | a19d6253f8a92ab50b279b859efce1ae27eec9d0 (patch) | |
| tree | ee60bad0892bf85086ead892d3be32a37d128850 /src/soc/amd/stoneyridge/psp.c | |
| parent | f3644ddae5a379bb755a65567a8bc807177d907d (diff) | |
soc/amd/stoneyridge/psp: use PSP_MAILBOX_BAR define
PSP_MAILBOX_BAR is defined as PCI_BASE_ADDRESS_4, so use it instead of
PCI_BASE_ADDRESS_4 in the code.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8658b674b9adea85dfc71d7036ccf3ae17464b58
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59700
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/psp.c')
| -rw-r--r-- | src/soc/amd/stoneyridge/psp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/psp.c b/src/soc/amd/stoneyridge/psp.c index 8d6290f619..b001d5f755 100644 --- a/src/soc/amd/stoneyridge/psp.c +++ b/src/soc/amd/stoneyridge/psp.c @@ -51,7 +51,7 @@ void *soc_get_mbox_address(void) return 0; } } else { - psp_mmio = pci_read_config32(SOC_PSP_DEV, PCI_BASE_ADDRESS_4) & + psp_mmio = pci_read_config32(SOC_PSP_DEV, PSP_MAILBOX_BAR) & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK; } |