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authorFelix Held <felix-coreboot@felixheld.de>2021-02-17 22:22:21 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-02-19 13:20:16 +0000
commite09294f57a03a21ff89b571b0a606c358fc97188 (patch)
treea8e9b378aec2dbd210a262169c0a138b04409c1f /src/soc/amd/stoneyridge/psp.c
parent285dd6ec3a8529d2b91eb657e85007be6a3397b6 (diff)
include/cpu/amd/msr: rename MSR_PSP_ADDR to PSP_ADDR_MSR
The new name is more consistent with the rest of the MSR definitions. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I5666d9837c61881639b5f292553a728e49c5ceb2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50855 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/psp.c')
-rw-r--r--src/soc/amd/stoneyridge/psp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/psp.c b/src/soc/amd/stoneyridge/psp.c
index cd14d7bf69..8d6290f619 100644
--- a/src/soc/amd/stoneyridge/psp.c
+++ b/src/soc/amd/stoneyridge/psp.c
@@ -45,9 +45,9 @@ void *soc_get_mbox_address(void)
/* Determine if Bar3Hide has been set, and if hidden get the base from
* the MSR instead. */
if (pci_read_config32(SOC_PSP_DEV, PSP_BAR_ENABLES) & BAR3HIDE) {
- psp_mmio = rdmsr(MSR_PSP_ADDR).lo;
+ psp_mmio = rdmsr(PSP_ADDR_MSR).lo;
if (!psp_mmio) {
- printk(BIOS_WARNING, "PSP: BAR hidden, MSR_PSP_ADDR uninitialized\n");
+ printk(BIOS_WARNING, "PSP: BAR hidden, PSP_ADDR_MSR uninitialized\n");
return 0;
}
} else {