soc/amd/stoneyridge: Relocate MMIO access of ACPI registers

The AcpiMmio block allowing direct access to the ACPI registers
has remained consistent across AMD models.  Move the support from
soc//stoneyridge to soc//common.

BUG=b:131682806

Change-Id: I0e017a71f8efb4b614986cb327de398644599853
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32655
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 0 insertions, 26 deletions

diff --git a/src/soc/amd/stoneyridge/pmutil.c b/src/soc/amd/stoneyridge/pmutil.c
index 7367251193..59de34890f 100644
--- a/src/soc/amd/stoneyridge/pmutil.c
+++ b/src/soc/amd/stoneyridge/pmutil.c
@@ -25,29 +25,3 @@ int vbnv_cmos_failed(void)
 	/* If CMOS power has failed, the century will be set to 0xff */
 	return cmos_read(RTC_CLK_ALTCENTURY) == 0xff;
 }
-
-int vboot_platform_is_resuming(void)
-{
-	if (!(acpi_read16(MMIO_ACPI_PM1_STS) & WAK_STS))
-		return 0;
-
-	uint16_t pm_cnt = acpi_read16(MMIO_ACPI_PM1_CNT_BLK);
-	return acpi_sleep_from_pm1(pm_cnt) == ACPI_S3;
-}
-
-/* If a system reset is about to be requested, modify the PM1 register so it
- * will never be misinterpreted as an S3 resume. */
-void set_pm1cnt_s5(void)
-{
-	uint16_t pm1;
-
-	pm1 = acpi_read16(MMIO_ACPI_PM1_CNT_BLK);
-	pm1 &= ~SLP_TYP;
-	pm1 |= SLP_TYP_S5 << SLP_TYP_SHIFT;
-	acpi_write16(MMIO_ACPI_PM1_CNT_BLK, pm1);
-}
-
-void vboot_platform_prepare_reboot(void)
-{
-	set_pm1cnt_s5();
-}