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authorChris Ching <chingcodes@chromium.org>2017-12-20 16:06:03 -0700
committerChris Ching <chingcodes@chromium.org>2018-01-03 22:33:49 +0000
commit6fc39d47d017409a30239a031b16413e30700452 (patch)
treef3b2a71f182ffd7982faa1fce31f93ec6f958232 /src/soc/amd/stoneyridge/include
parentfc511277a57857fe5fd41bf0d877d1dd17f3b92f (diff)
soc/amd/stoneyridge: Add I2C support
BUG=b:69416132 BRANCH=none TEST=make Change-Id: Id940af917c9525aba7bc25eea0821f5f36a36653 Signed-off-by: Chris Ching <chingcodes@chromium.org> Reviewed-on: https://review.coreboot.org/22959 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/iomap.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h
index 64a9b30f2f..ac340a62af 100644
--- a/src/soc/amd/stoneyridge/include/soc/iomap.h
+++ b/src/soc/amd/stoneyridge/include/soc/iomap.h
@@ -22,6 +22,11 @@
#define SPI_BASE_ADDRESS 0xfec10000
#define IO_APIC2_ADDR 0xfec20000
+/* I2C fixed address */
+#define I2C_BASE_ADDRESS 0xfedc2000
+#define I2C_DEVICE_SIZE 0x00001000
+#define I2C_DEVICE_COUNT 4
+
#if IS_ENABLED(CONFIG_HPET_ADDRESS_OVERRIDE)
#error HPET address override is not allowed and must be fixed at 0xfed00000
#endif