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authorDaniel Kurtz <djkurtz@chromium.org>2018-02-01 15:18:38 -0700
committerMartin Roth <martinroth@google.com>2018-02-06 15:10:20 +0000
commite0ea98258a81e09542cdbe239e839e9698e582dd (patch)
tree3171dde633d45d19d188d3b93469ce938fb199b7 /src/soc/amd/stoneyridge/include
parentda6f4ae0b98313aae9e6295e412d87b11199501f (diff)
soc/amd/stoneyridge: Add API to initialize non-early_init i2c buses
Provide a method for initializing i2c buses that are not marked as early_init in the device tree. These i2c buses can be enabled in a mainboard's ramstage, for example. BUG=b:69407112 TEST=Boot depthcharge w/ CLI enabled on grunt. devbeep => plays beep BRANCH=None Change-Id: I6e49b0de9116138ba102377d283e22d7b50d7dca Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-on: https://review.coreboot.org/23553 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 2f9d9f9e68..f4d6b17a03 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -392,4 +392,7 @@ int mainboard_get_ehci_oc_map(uint16_t *usb_oc_map);
/* Initialize all the i2c buses that are marked with early init. */
void i2c_soc_early_init(void);
+/* Initialize all the i2c buses that are not marked with early init. */
+void i2c_soc_init(void);
+
#endif /* __STONEYRIDGE_H__ */