diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-05-01 21:17:20 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-05-08 13:49:29 +0000 |
| commit | b435d4405dacdc218777aaba349151ae28997741 (patch) | |
| tree | 157ac0af9da3f57e88b6dcc5d131bd6dc209fe5b /src/soc/amd/stoneyridge/include | |
| parent | 753c225c2c22df0260a97d3eabaaf15aeb0c4bd6 (diff) | |
soc/amd/stoneyridge: Add aoac_ read/write functions
Add 8-bit functions to access the AOAC registers and use them in
southbridge.c. At this time, there is no reason to pursue WORD or
DWORD access and it's not known if those transaction sizes are
supported.
Change-Id: I3a8f493625f941fb855c0b8a0eff511a9a5ddfe8
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32645
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index aed3288ae8..098d24edbb 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -533,6 +533,8 @@ uint8_t smbus_read8(uint8_t offset); uint16_t smbus_read16(uint8_t offset); void smbus_write8(uint8_t offset, uint8_t value); void smbus_write16(uint8_t offset, uint16_t value); +uint8_t aoac_read8(uint8_t reg); +void aoac_write8(uint8_t reg, uint8_t value); void bootblock_fch_early_init(void); void bootblock_fch_init(void); /** |