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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-06-13 14:19:02 -0600
committerMartin Roth <martinroth@google.com>2017-06-27 20:51:46 +0000
commit8a906dff84950c0789afc05e046a377846f7f6ea (patch)
tree09cfacc1669b41f9a8299f58e02bda0938706463 /src/soc/amd/stoneyridge/include
parentf3dc71e0310859ebec687a6d67d1fa8140fad754 (diff)
soc/amd/stoneyridge: Remove PCIe-PCI bridge
The Stoney Ridge does not contain this bridge like some of the older Hudson FCHs. Remove this support from the source. This moves the Stoney Ridge IRQ setup to the southbridge file, hudson.c. BUG=chrome-os-partner:62580062 Change-Id: I8f974ba76b8c20f4335dd8872eaf4b8172188ee2 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/20198 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/pci_devs.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/pci_devs.h b/src/soc/amd/stoneyridge/include/soc/pci_devs.h
index f0445422a9..33973e2f53 100644
--- a/src/soc/amd/stoneyridge/include/soc/pci_devs.h
+++ b/src/soc/amd/stoneyridge/include/soc/pci_devs.h
@@ -90,12 +90,6 @@
#define LPC_DEVID 0x780e
#define LPC_DEVFN PCI_DEVFN(LPC_DEV, LPC_FUNC)
-/* PCI Ports */
-#define SB_PCI_PORT_DEV 0x14
-#define SB_PCI_PORT_FUNC 4
-#define SB_PCI_PORT_DEVID 0x780f
-#define SB_PCI_PORT_DEVFN PCI_DEVFN(SB_PCI_PORT_DEV, SB_PCI_PORT_FUNC)
-
/* SD Controller */
#define SD_DEV 0x14
#define SD_FUNC 7